DIGITAL SYSTEM FOR POLYETCHNIC STUDENTS

Published by:
Politeknik Kota Kinabalu,
No. 4, Jalan Politeknik, KKIP Barat,
88460 Kota Kinabalu,Sabah.
Tel:088-401800
First published 2017
© Seri Alifah binti Dahnel

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or
transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise,
without the prior permission of the Copyright owner.

Editor: Ahmad Ikhwan bin Ahmad
Designers: Nurhazawani binti Yahya & Shahzan Hafi z bin Samsudin

Printed by:
Vv Photocopy Center,
Lot 64 Block C,
Lorong Plaza Kingfisher 3,
88450 Kota Kinabalu, Sabah.

Digital and analog worlds are complementary to each other. The digital revolution nowadays is
often used as a benchmark to continue creating more systems as the technologies are constantly
changing. In understanding that structure, there are basic concepts need to be mastered.
Therefore, this supplementary reference book is appropriate in capturing the concepts and
principles of modern digital systems.

This book is written specifically for mechatronics engineering students of polytechnic Malaysia
in accordance with the issued Digital System curriculum contents. It covers six major topics of
Number and Coded Systems, Boolean Operations, Sequential Logic, Counters, Registers and
Converters. These contents are explained based on their basic principles regardless of the latest
sophisticated technologies which do not longer adopt those principles. It includes detail
explanations regarding the theories of digital circuits as well as several examples and practices
that can help in enhancing the comprehension of the topics discussed.

I also find this book as a more subtle approach in promoting further understanding of the Digital
System while guiding various stages of novices and learners besides the initial target groups. It is
supported with abridged tables, appropriate diagrams, graphical illustrations and elementary
formulas; hence it is expected to increase interest of Digital System researchers. Hopefully, this
Digital System book can provide benefits for polytechnic students in particular and for all those
in need.

Any feedbacks for improvement are highly welcome.

Seri Alifah binti Dahnel

Special thanks to my husband, kids, Anis &
Anas, family members and colleagues.

iii

Preface .......................................................................................................................... iii
Contents ....................................................................................................................... iv

CHAPTER 1 : NUMBER AND CODED SYSTEMS......................................1

1.0 Introduction ..............................................................................................................2
1.1 Decimal Number ......................................................................................................2
1.2 Binary Number .........................................................................................................7
1.3 Octal Number .........................................................................................................11
1.4 Hexadecimal Number .............................................................................................15
1.5 BCD 8421 (Binary Coded Decimal 8421) .............................................................20
1.6 2’s Complement .....................................................................................................26
1.7 ASCII Code ............................................................................................................32

CHAPTER 2 : BOOLEAN OPERATIONS ...................................................34

2.0 Logic Gates..............................................................................................................35
2.1 Universal Gates .....................................................................................................39
2.2 Boolean Expression.................................................................................................40
2.3 Boolean Laws and Theorems ................................................................................46
2.4 Representation of Boolean Expressions (SOP and POS) ......................................56
2.5 Minimization of Logic Circuit (Karnaugh Map).....................................................59

CHAPTER 3 : SEQUENTIAL LOGIC..........................................................77

3.0 Introduction .............................................................................................................78
3.1 SR NAND Gate Latch ...........................................................................................79
3.2 SR NOR Gate Latch ...............................................................................................82
3.3 Clocked SR Flip-flop .............................................................................................85
3.4 Clocked SR Flip-flop with Asynchronous Inputs Preset and Clear .......................89
3.5 JK Flip-flop .............................................................................................................93
3.6 T Flip-flop ..............................................................................................................96
3.7 D Flip-flop.............................................................................................................100

iv

CHAPTER 4 : COUNTERS ..........................................................................103

4.0 Introduction ...........................................................................................................104
4.1 Asynchronous Counter ........................................................................................104

4.1.1 Asynchronous Up Counter ..................................................................................105
4.1.2 Asynchronous Down Counter .............................................................................111
4.1.3 Asynchronous Up / Down Counter......................................................................114
4.1.4 Asynchronous Counter with MOD ≠ 2 .............................................................118
4.1.5 Asynchronous Counter as a Frequency Divider .................................................122
4.2 Synchronous Counter ...........................................................................................126

CHAPTER 5 : REGISTERS..........................................................................141

5.0 Introduction ...........................................................................................................142
5.1 Serial In / Serial Out (SISO) ................................................................................143
5.2 Serial In / Parallel Out (SIPO)...............................................................................146
5.3 Parallel In / Serial Out (PISO) .............................................................................150
5.4 Parallel In / Parallel Out (PIPO)............................................................................154
5.5 Shift Register as Arithmetic Circuits ...................................................................156

5.5.1 Multiplier Circuits ...............................................................................................156
5.5.2 Divider Circuits ...................................................................................................157
5.6 Shift Register Counters .......................................................................................160
5.7 Applications of Shift Register ..............................................................................165

CHAPTER 6 : CONVERTERS.....................................................................166

6.0 Introduction ...........................................................................................................167
6.1 Digital-to-Analog Conversion (DAC) .................................................................169

6.1.1 Binary Weighted Resistor ...................................................................................175
6.1.2 R-2R Ladder ........................................................................................................182
6.2 Analog-to-Digital Conversion (ADC) ..................................................................186
6.2.1 Digital Ramp .......................................................................................................188
6.1.2 Successive Approximation ..................................................................................192
References ................................................................................................................. 199

v



DIGITAL SYSTEM

1.0 INTRODUCTION
 The number systems are basic understandings of the digital systems. They are the mathematical
notations to represent numbers and quantities in their own concepts. There are four most common
numerical representations denoted as base numbers such as in Figure 1.1.

Figure 1.1 : Number systems

1.1 DECIMAL NUMBER

 Decimal number is a number system with base-10 and it contains 0, 1, 2, 3, 4, 5, 6, 7, 8 and 9.
 For the integer part, the base-10 is increasing from the last bit of the integer number with the

value of 100 towards the first bit of that number with 10 .
 Meanwhile, the first digit of fractional number has the value of 10−1 and it decreases its

fractional number towards the end of the number.

Integer part Fractional part

Set of decimal XX X X . XX
number 103 102 101 100 10−1 10−2
(1000) (100) (10) (1)
.
(0.1) (0.01)

Increasing in its decimal number (1 1000) Decreasing in its decimal number (0.1  0.01)

2

DIGITAL SYSTEM

125.710

-1 0.7
5
7 × 10 =

0

5 × 10 =

1

2 × 10 = 20

2

1 × 10 = 100

125.710

Example 1: - The integer
Convert 85.3510 to binary number. part is its
binary number.
Integer part Remainder Fractional part Binary
- Only the
85/2 = 42 1 0.35 × 2 = 0.7 0 fractional part
42/2 = 21 0 0.7 × 2 = 1.4 1 brought
21/2 = 10 1 0.4 × 2 = 0.8 0 downward to do
10/2 = 5 0 0.8 × 2 = 1.6 1 the same
5/2 = 2 1 …. iteration.
2/2 = 1 0
1/2 = 0 1  0.0101 …2
∴ 85.3510  1010101.01012
 10101012

Example 2:
Convert 853510 to octal number.

8535/8 = 1066 Remainder How to get the
1066/8 = 133 remainder?
133/8 = 16 7
16/8 = 2 2 8535 - (1066 × 8) = 7
2/8 = 0 5 1066 - (133 × 8) = 2
0 133 - (16 × 8) = 5
2 16 - (2 × 8) = 0
2 - (0 × 8) = 2

∴ 217310  205278

3

DIGITAL SYSTEM

Example 3:
Convert 8535.9710 to hexadecimal number.

Integer part Fractional part

9632/16 = 602 Remainder Hexadecimal
602/16 = 37
37/16 = 2 0 0.97 × 16 = 15.52 15 (F)
2/16 = 0 10 (A) 0.52 × 16 = 8.32 8
5 0.32 × 16 = 5.12 5
2 0.12 × 16 = 1.92 1
….
 25 016
 0. 851 …16

∴ 8535.9710  25 0. 85116

Convert the following decimal numbers to their equivalent numbers.
a) 195.6710 to 2

4

b) 46.2510 to 2 DIGITAL SYSTEM
c) 138410 to 8 5
d) 0.7625110 to 8

e) 423.7310 to 8 DIGITAL SYSTEM
f) 1522610 to 16 6
g) 0.92510 to 16

DIGITAL SYSTEM

h) 56611.9510 to 16

1.2 BINARY NUMBER

 Binary number is a number system with base-2 and it contains only 0 and 1.
 Similar to the concept of decimal number, the Least Significant Bit (LSB) belongs to the first

value of base-2 which is 20 whereas the Most Significant Bit (MSB) gives the largest number of
base-2 in its sequence. The base-2 is increasing from the LSB towards the MSB.

MSB LSB

Set of binary 10 1 0 0 1
number

25 24 23 22 21 20

(32) (16) (8) (4) (2) (1)

Increasing in its decimal number (1  32)

The LSB is always located at the right-most
bit in a series of binary number while the

MSB is the greatest value in binary number
at the left-most position.

 For the fractional binary number, the first digit of fractional number has the value of 2−1 and it
increases in power towards the end of the number. However, it decreases its fractional number.

7

DIGITAL SYSTEM

Integer part

Set of binary 0. 01 1 1
number
(fractional) 20 2−1 2−2 2−3 2−4

.
(1) (0.5) (0.25) (0.125) (0.0625)

Decreasing in its decimal number (0.5  0.06252)

 Table 1.1 concludes the concept of binary number system for both parts.

Table 1.1 : Binary Number System

MSB Binary Number System LSB
2−2
8s 22 21 20 . 2−1 0.25s
4s 0.5s
2s 1s .

Example 1:
Convert 10011.12 to decimal number.

10011 .1
24 23 22 21 20 2−1
(16) (8) (4) (2) (1)
.
(0.5)

= (1 × 16) + (0 × 8) + (0 × 4) + (1 × 2) + (1 × 1) + (1 × 0.5)
= (16 + 0 + 0 + 2 + 1) + (0.5) = 19. 5

∴ 10011.12  19.510

8

Example 2: DIGITAL SYSTEM
Convert 10011.12 to octal number. Separated in 3 bit

010 011 . 100 (Refer to 1.3)
23 . 4
Separated in 4 bit
∴ 10011.12  23.48 (Refer to 1.4)

Example 3:
Convert 10011.12 to hexadecimal number.

0001 0011 . 1000
13 . 8

∴ 10011.12  13.816

Convert the following binary numbers to their equivalent numbers.

a) 1101101.012 to 8 b) 1001101012 to 8

9

DIGITAL SYSTEM

c) 11000.112 to 10

d) 11110012 to 10

e) 1110110111110102 to 16 f) 100011011111.0102 to 16

10

DIGITAL SYSTEM

1.3 OCTAL NUMBER

 Octal number is a number system with base-8 and it contains 0, 1, 2, 3, 4, 5, 6 and 7.
 Similar to decimal and binary number system, it decreases its power from MSB to LSB as in

Table 1.2.

Table 1.2 : Octal number system

MSB Octal Number System LSB
8−2
82 81 80 . 8−1

Decreasing in its power of 8

 As it contains until digit 7 which is 111 (in binary number system), the octal number can be
represented in 3 bit binary number.

 Table 1.3 below shows the octal number with its equivalent binary number.

Table 1.3 : Octal numbers with their equivalent binary number

Binary 22 21 20

Octal (4) (2) (1)

0000
1001
2010
3011
4100
5101
6110
7111

11

DIGITAL SYSTEM
Example 1:
Convert 675.18 to binary number.

675 . 1
110 111 101 . 001

∴ 675.18  110111101.0012

Example 2:
Convert 675.18 to decimal number.

67 5 .1
82 81 80 8−1
(64) (8) (1)
.
(0.125)

= (6 × 64) + (7 × 8) + (5 × 1) + (1 × 0.125)
= (384 + 56 + 5) + (0.125) = 445.125

∴ 675.18  445.12510

Example 3: Step 2 : Convert binary to hexadecimal number
Convert 675.18 to hexadecimal number.
0001 1011 1101 . 0010
Step 1 : Convert octal to binary number
675 . 1 11 13 2
110 111 101 . 001 1.

 110111101.0012 (B) (D)

∴ 675.18  1 . 216

12

DIGITAL SYSTEM

Express the following octal numbers to their equivalent numbers.
a) 754.638 to 2

60518 to 2

c) 274338 to 10

13

d) 5410.768 to 10 DIGITAL SYSTEM
e) 41.3658 to 16 14
f) 7528 to 16

DIGITAL SYSTEM

1.4 HEXADECIMAL NUMBER

 Hexadecimal number is a base-16 number which shows that it has 16 possible symbols.
 It represents 10 decimal numbers from 0 to 9 and 6 alphabetic letters from A to F.
 It reduces in power of 16 as it approaches the LSB.

Set of MSB LSB
hexadecimal XXXX . XX
number 163 162 161 160 . 16−1 16−2

Decrease in power of 16 from MSB to LSB

 It can be represented in 4 bit binary number as its maximum bit is F which is 1111 (binary
number). Table 1.4 shows hexadecimal number with its equivalent decimal and binary numbers
while Table 1.5 is the summarization steps of all numbers conversion.

Table 1.4 : Hexadecimal numbers with their equivalent decimal and binary numbers.

Hexadecimal Decimal Binary Number
23 22 21 20
Number Number (8) (4) (2) (1)
0 0 00
00 0 0 01
11 0 0 10
22 0 0 11
33 0 1 00
44 0 1 01
55 0 1 10
66 0 1 11
77 1 0 00
88 1 0 01
99 1 0 10
A 10 1 0 11
B 11 1 1 00
C 12 1 1 01
D 13 1 1 10
E 14 1 1 11
F 15

15

Table 1.5 : Simple methods of converting numbers

BINARY DECIMAL OCTAL HEXADECIMAL

 Each bit is separated Integer part Integer part
individually. The set of numbers is The set of numbers is
separated into 3 bits separated into 4 bits
 They are then starting from the last bit starting from the last bit
multiplied with its (Each column has 3 bits). (Each column has 4 bits).
weight, base-2 .

 Sum up all the bits.

BINARY X X X. X Fractional part* (if any) Fractional part* (if any)
The set of numbers is The set of numbers is
22 21 20 . 2−1 separated into 3 bits separated into 4 bits
starting from the first bit starting from the first bit
(4) (2) (1) (0.5) of fraction number. (Each of fraction number. (Each
column has 3 bits). column has 4 bits).
= (X × 4) + (X × 2 ) + ……
= XXX XXX . XXX XXXX XXXX . XXXX

x x.x x x.x

Integer part Integer part Integer part
Integer number is divided
by 2. Integer number is divided Integer number is divided

Fractional part* (if any) by 8. by 16.
Fractional number is
multiplied by 2. Fractional part* (if any) Fractional part* (if any)
Fractional number is Fractional number is
Integer part multiplied by 8. multiplied by 16.

DECIMAL XX / 2 Integer part Integer part
DIGITAL SYSTEMXX / 2
16 XX / 8 XX / 16
Fractional part* (if any) XX / 8 XX / 16

0.XX × 2 = X.XX Fractional part* (if any) Fractional part* (if any)
0.XX × 2 = X.XX
0.XX × 8 = X.XX 0.XX × 16 = X.XX
0.XX × 8 = X.XX 0.XX × 16 = X.XX

BINARY DECIMAL OCTAL HEXADECIMAL

 Each bit is separated  Each bit is separated 1. Convert to binary
number (refer octal
individually. individually. - binary).

 They are then  They are then multiplied 2. The binary number
is then converted to
converted into binary with its weight, base-8 . hexadecimal
number (refer
number (3 bits).  Sum up all the bits. binary – hexa.).

 Combine all binary

OCTAL numbers obtained. X X X. X

X X.X X 82 81 80 . 8−1
xxx xxx . xxx xxx
(64) (8) (1) (0.125)

= (X × 64) + (X × 8 ) + ……
=

HEXADECIMAL  Each bit is separated  Each bit is separated 1. Convert to binary
individually. number (refer
individually. hexa. - binary).
 They are then
converted into binary  They are then multiplied 2. The binary
number (4 bits). with its weight, base-16 number is then
regrouped into 3
 Combine all binary  Sum up all the bits. bit (refer binary to
numbers obtained. octal).
X X. X
X X.X
161 160 16−1
xxxx xxxx . xxxx
DIGITAL SYSTEM.
17
(16) (1) (0.0625)

= xxxxxxxx . xxxx = (X × 16) + (X × 1 ) + ……
=

DIGITAL SYSTEM
Example 1:
Convert 2 . 616 to binary number.

2 EA . 6
0010 1110 1010 . 0110

∴ 2 . 616  001011101010.01102

Example 2:
Convert 2 . 616 to decimal number.

2 E (14) A (10) . 6

162 161 160 16−1
(256) (16) (1) .

(0.0625)

= (2 × 256) + (14 × 16) + (10 × 1) + (6 × 0.0625)
= (512 + 224 + 10) + (0.375) = 746.375

∴ 2 . 616  746.37510

Example 3: Step 2 : Regroup the binary number into 3 bits
Convert 2 . 616 to octal number.
001 011 101 010 . 001 000
Step 1 : Convert to binary number 1352 . 10

2 E A . 6
0010 1110 1010 . 0110

 001011101010.01102 ∴ 2 . 616  1352.108

18

DIGITAL SYSTEM

Convert the following hexadecimal numbers to their equivalent numbers.

a) 92 116 to 2 b) 145. 316 to 2

c) 3648.116 to 8

d) 64 616to 8

19

DIGITAL SYSTEM

e) . 7216 to 10
f) 154.8 16 to 10

1.5 BCD 8421 (BINARY CODED DECIMAL 8421)
 8421 is referring to the weight for each digit and it is different from binary number.
 Each decimal digit can be encoded into group of 4 bit binary number such as 273 in BCD code is
0010 0111 0011.
 Maximum number for BCD is 1001.

BCD ⇌ Decimal ⇌ Binary

 It is suitable for interfaces such as keypad input and LED clock.
 Table 1.6 shows the conversion steps of BCD to decimal and binary number.

20

Table 1.6 : Conversion methods of BCD code DIGITAL SYSTEM
BCD
TO DECIMAL BINARY
FROM

Integer part - Refer to the step of
The set of numbers is converting decimal to
separated into 4 bits binary.
starting from the last bit
(Each column has 4 bits).

BCD Fractional part* (if any)
The set of numbers is
separated into 4 bits
starting from the first bit
of fraction number. (Each
column has 4 bits).

XXXX XXXX . XXXX  Each bit is separated
x x.x individually.

- Refer to the step of  They are then
converting binary to converted into binary
decimal. number (4 bits).

BINARY  Combine all binary
numbers obtained.

X X.X
xxxx xxxx . xxxx
= xxxxxxxx . xxxx

21

DIGITAL SYSTEM

Example 1 :
Convert 101100011.010 to its equivalent binary number.

Step 1 : Convert BCD to decimal number

101100011.010

0001 0110 0011 . 0100
163 . 4

 163.410
Step 2 : Convert decimal to binary number

Integer part Fractional part

163/2 = 81 Remainder Binary
81/2 = 40
40/2 = 20 1 0.4 × 2 = 0.8 0
20/2 = 10 1
10/2 = 5 0 0.8 × 2 = 1.6 1
5/2 = 2 0
2/2 = 1 0 0.6 × 2 = 1.2 1
1/2 = 0 1
0 ……
1
 0.011 …2

∴ 101100011.010  10100011.0112

 101000112

22

DIGITAL SYSTEM

Example 2 :
Express 1100110.012 in the equivalent BCD number.

Step 1 : Convert binary to decimal number

1100110 .0 1
26 25 24 23 22 21 20
(64) (32) (16) (8) (4) (2) (1) 2−1 2−2
.

(0.5) (0.25)

= 64 + 32 + 4 + 2 + 0.25 = 102.25
 102.2510

Step 2 : Convert decimal to BCD code

1 0 2 . 2 5
0001 0000 0010 . 0010 0101

∴ 1100110.012  000100000010.00100101

1. Express the following BCD values as equivalent binary numbers.
a) 10011100001001 to 2

23

DIGITAL SYSTEM
b) 10000011.0110001001 to 2

24

DIGITAL SYSTEM

2. Convert the following binary numbers to their BCD notation.
a) 1100110.112 to

b) 10001012 to

25

DIGITAL SYSTEM

1.6 2’S COMPLEMENT
 2’s complement is a system to represent the negative numbers (binary form) in the absolute value.
 The MSB is still the sign bit which is either positive (+) or negative ( ̶ ). In general, 0 in the
signed bit (MSB) represents a positive number whereas 1 represents a negative number.

+ 2510 = 011001
̶ 2510 = 111001

The signed bit

 In order to perform 2’s complement:
 Obtain the 1’s complement for the number by changing all binary numbers from 1 to 0
and vice versa unless the signed bit.
 Add 1 into the 1’s complement number.

+ 9810 = 11000102 ̶ 9810 = 11000102
01100010
11100010  Binary number
10011101  1’s complement

10011101  2’s complement
1

10011110

As 2’s complement is a system to indicate
negative numbers, the positive numbers do not
have any affect in their binary values.

26

DIGITAL SYSTEM

 Figure 1.2 shows four possible cases of 2’s complement system in addition and subtraction
operations which are:

Figure 1.2 : 2’s complement cases

Example 1:
Solve 11010 ̶ 6210 by using 8 bit 2’s complement system.

11 1 11 CASE 1

110  0 110 1110 0 110 1110 + 48
+ 1 100 0010
− 62  1 011 1110 10 011 0000
1 100 0001
1 Discard bit-9
1 100 0010
∴ 0 011 0000

27

DIGITAL SYSTEM

Example 2:
Perform 2116 − 16 in 2’s complement system.

CASE 2

− 0 0010 0001 So far
Step 1 : Convert hexadecimal to binary number + 1 0011 0011
21  0 0010 0001
1 0101 0100

− CD  1 1100 1101 Case II : –ve > +ve , find 2’s complement to
1 0011 0010 obtain the correct answer.
1
1 0011 0011

1 0101 0100 ̶ 172
1 1010 1011

1
1 1010 1100

∴ 1 1010 1100

Example 3: by using 2’s complement system.
Solve 4810 + 5510

+ 0 11 0000 CASE 3
48  0 11 0000 + 0 11 0111 + 103
55  0 11 0111
1 10 0111

∴ 110 0111

28

DIGITAL SYSTEM

Example 4:
Perform the addition of −2910 and − 8710 in 8 bit 2’s complement system.

CASE 4

− + (− ) − − 1110 0011
+ 1010 1001
− 29  1 001 1101 1 1000 1100 So far
1 110 0010
1 Case IV : Both are –ve , find 2’s complement to
1 110 0011 obtain the correct answer.

− 87  1 101 0111 1 000 1100
1 010 1000 1 111 0011
1
1 010 1001 1
1 111 0100
̶ 116

∴ 1 111 0100

1. Solve the following arithmetic operations by using 8 bit 2’s complement.
a) 1310 − ( ̶ 7210)

29

b) −9510 + 1810 DIGITAL SYSTEM
c) −4910 − (+7610) 30
d) −610 + 2810

DIGITAL SYSTEM

2. Compute the operations in 2’s complement system.
a) −3316 + ( ̶ 6 16)

b) 9516 − 2516

c) 2 16 + ( ̶ 116)

31

DIGITAL SYSTEM

1.7 ASCII CODE

 ASCII code is an acronym for American Standard Code for Information Interchange.
 It is universally used in most electronic devices so that the system can recognize the characters

and represent text (letters, numbers and symbols).
 Basically it works so that when the key on ASCII keyboard is depressed, that key is converted

into ASCII code and processed by the computer before outputting to a display terminal (printer).
 It used 7-bit binary code which representing 128 characters as 27 = 128 as listed in Table 1.7.

Table 1.7 : ASCII code characters

BINARY 000 001 010 011 100 101 110 111

BINARY HEX 0 1 2 3 45 67
0000 0 NUL DLE SP ˽ 0 @P `p
0001 1 SOH DC1 1 AQ aq
0010 2 STX DC2 ! 2 BR br
0011 3 ETX DC3 “ 3 CS cs
0100 4 EOT DC4 # 4 DT dt
0101 5 ENQ NAK $ 5 EU eu
0110 6 ACK SYN % 6 FV fv
0111 7 BEL ETB & 7 GW gw
1000 8 BS CAN ‘ 8 HX hx
1001 9 HT EM ( 9 IY iy
1010 A LF SUB ) : JZ jz
1011 B VT ESC * ; K[ k{
1100 C FF FS + < L\ l|
1101 D CR GS , = M] m}
1110 E SO RS - > N^ n~
1111 F US . ? O_ o DEL
SI /

Read the MSB line first
followed by the LSB line!

32

DIGITAL SYSTEM

Example:
Encode the word Beautiful ! in ASCII code with hexadecimal digits.

Bea t i f u l !

42 65 61 74 69 66 75 6C 20 21

1. Encode the phrases below in ASCII code with both hexadecimal and binary digits.
a) {It’s now 1.23p.m.}

2. Decode the ASCII code message of:
100 0011 110 1000 110 0001 111 0000 111 0100 110 0101 111 0010 011 0001

33



DIGITAL SYSTEM
2.0 LOGIC GATES

 Logic gates are basic building blocks in a digital circuit.
 Most logic gates have two inputs and more, with only one output. Yet there is still a logic gate

that only has one input and output which is NOT gate.
 The terminal input serves either bit 1 (HIGH) or 0 (LOW) to show different voltage levels. The

LOW state indicates approximately 0V whereas the HIGH state refers to the maximum positive
volts in its circuit.
 There are seven basic logic gates: AND, OR, NOT, NAND, NOR, XOR and XNOR.

Complete the table of logic gates below in terms of their symbol, expression and truth table.
a) AND
Symbol :

Truth table :
XYQ
00
01
10
11

Boolean expression :

35

DIGITAL SYSTEM

b) OR
Symbol :

Truth table :
XYQ

Boolean expression : X Q
c) NOT
Symbol :
Truth table :

Boolean expression :

36

DIGITAL SYSTEM

d) NAND
Symbol :

Truth table :
XYQ

Boolean expression :

e) NOR
Symbol :

Truth table :
XYQ

Boolean expression :

37

DIGITAL SYSTEM

f) XOR / EOR
Symbol :

Truth table :
XYQ

Boolean expression :

g) XNOR / ENOR
Symbol :

Truth table :
XYQ

Boolean expression :

38

DIGITAL SYSTEM
2.1 UNIVERSAL GATES

 Universal gates are the logic gates that can be implemented to construct any other gate types such
as AND, OR and NOT gate.

 There are two universal gates which are:
i. ___________________
ii. ___________________

Construct and prove the following logic gates by using NAND gate.
a) AND

b) OR

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DIGITAL SYSTEM

c) NOT

2.2 BOOLEAN EXPRESSION
 The output for a logic circuit can be obtained from the Boolean expression of each input by
considering the Boolean expression for each gate is true.
 Therefore, the value of final output either 1 or 0 can be determines based on its expression.

Example:
Determine the Boolean expression and the output values,Q for the circuit below.

RS RS + ̅ ̅̅+̅̅̅ ̅
̅ ̅̅+̅̅̅ ̅
∴ Boolean expression, Q = RS + S̅̅̅+̅̅̅T̅

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DIGITAL SYSTEM
R S T Q Justification
0 0 0 1 Q = (0.0) + ̅0̅̅+̅̅̅0̅ = 1
0 0 1 0 Q = (0.0) + ̅0̅̅+̅̅̅1̅ = 0
0 1 0 0 Q = (0.1) + ̅1̅̅+̅̅̅0̅ = 0
0 1 1 0 Q = (0.1) + 1̅̅̅+̅̅̅1̅ = 0
1 0 0 1 Q = (1.0) + ̅0̅̅+̅̅̅0̅ = 1
1 0 1 0 Q = (1.0) + ̅0̅̅+̅̅̅1̅ = 0
1 1 0 1 Q = (1.1) + 1̅̅̅+̅̅̅0̅ = 1
1 1 1 1 Q = (1.1) + 1̅̅̅+̅̅̅1̅ = 1

1. Obtain the Boolean expressions for each logic circuit.
a)

∴ Boolean expression :

41

b) DIGITAL SYSTEM
∴ Boolean expression : 42
c)

∴ Boolean expression :

DIGITAL SYSTEM
2. Complete the truth tables below according to their respective logic circuit diagrams.

a)

ABCQ

010

1 11

111

00 0

b)

ABCQ
00
01
10
11

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DIGITAL SYSTEM
c)

X Y ZWQ

010

011

01 0

1 01

11 1

d)

44