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Principles of OversamplingA/DConversion* MAX W. HAUSER Ithaca, NY 14850, USA ... of oversampling, and its diverse explanations in the literature, arises from surveying

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Principles of OversamplingA DCo version

Principles of OversamplingA/DConversion* MAX W. HAUSER Ithaca, NY 14850, USA ... of oversampling, and its diverse explanations in the literature, arises from surveying

PAPERS

Principles of OversamplingA/D Conversion*

MAX W. HAUSER

Ithaca, NY 14850, USA

Growing practical importance of oversampling analog-to-digital converters (OSADCs)
reflects a synergism between microelectronic technology trends and signal theory,
neither of which alone is sufficient to explain OSADCs fully. This paper reviews the
overall problem of performing signal acquisition--antialiasing, sampling, and
quantization--with real hardware, and the ways in which oversampling facilitates this
task, sometimes counterintuitively. OSADCs can be seen to overlap and redispose
these three traditionally separate operations so as to use manufacturable technology
efficiently. Various analog topologies in OSADCs--multibit, 1-bit, feedback, and
feedforward--can accomplish the critical step of noise shaping. They differ in their
detailed behavior and the'ir dependence on fabrication technology. Insight into the roles
of oversampling, and its diverse explanations in the literature, arises from surveying
the disparate "cultures" of analog-to-digital conversion that have contributed to its
development. Finally, in various ways OSADCs can (and cannot) be compared both
to more conventional (sample-by-sample) analog-to-digital converters, and to predictive
coders, such as delta modulators.

0 INTRODUCTION design. These sections emphasize the crucial interplay
between signal theory and implementation technology.
Oversampling analog-to-digital converters (OSADCs)
address multiple technical problems simultaneously, Sec. 6 returns to perspectives on OSADCs, reviewing
and moreover, these devices arose historically from
developments in at least three identifiable research their relationship to two other types of systems with
communities, each with a separate perception of why
oversampling is useful. Yet transcending the many im- which OSADCs are (sometimes inappropriately) com-
plementations, topologies, explanations, and com-
mercial terms of OSADCs are a few basic principles, pared--"conventional" A/D converters and delta mod-
This tutorial-review paper seeks to gather these prin-
ulators--_and summarizing the history of their devel-
ciples; to place OSADCs in relation to other practical
analog-digital interfaces; and to illuminate the intuitive opment. The references are organized by subtopic as
and "cultural" issues of concern to users and designers a bibliography on OSADCs and their technical foun-
of OSADCs for audio. dations.

The paper is organized as follows. Sec. 1 summarizes I BACKGROUND
the signal-acquisition problem and, briefly, the different
pictures of A/D conversion that coincide in OSADCs. 1.1 Signal Acquisition
The next four sections, 2-5, treat technical principles: Any complete interface between continuous-time
oversampling for antialias (AA) filtering, for signal
quantization, alternative analog topologies, and a few analog signals and their discrete-time digital represen-
comments on the broad subject of OSADC decimator tation entails the three distinct tasks of AA filtering,
sampling, and quantization. Recently Carley [49] has
* Manuscript received 1990 August 21; revised 1990 Oc- popularized the term signal acquisition for this set of
tober31. tasks. In the traditional configuration of Fig. 1, the
three mathematical operations were performed sepa-
J. AudioEngS. oc.V, ol.39,No.1/2,1991January/February rately. Implementing signal acquisition with real tech-
nologies is a problem that differs significantly from
both digitizing isolated analog samples ("data acqui-
sition") and encodinganalog signal sourcesfor data-

3

HAUSER PAPERS

rate efficiency--problems that form the context for or it may omit the analog AA filter of Fig. 2, which is
much of the existing literature related to analog-digital much simpler to implement than that of Fig. 1. This
interfaces, paper developsthe themesthat introducingthe elevated
intermediate sampling rate in Fig. 2 not only can sim-
To review Fig. 1 from right to left, quantization plify the required analog AA filter and quantizer, but
converts from a continuous to a discrete set of values, more fundamentally will tend to overlap the operations
while sampling discretizes the time scale. Provided of antialiasing, sampling, and quantizing, so that they
that the sampling rate Fs exceeds twice the bandwidth no longer occur in isolated steps, as in Fig. 1.
(in hertz) of the analog signal to be captured (that is,
exceeds the Nyquist rate for that signal),] the original There is no fundamental (signal- or information-the-
analog signal may in principle he reconstructed exactly oretic) reason why signal-acquisition systems need to
from its samples. Finally, the AA filter ensures that oversample. The motivations for doing so derive not
the signal to be sampled, including unwanted corn- from the three basic tasks in Fig. 1, but rather from
ponents such as noise and out-of-band interference, is the technology that implements these tasks with finite
properly band-limited prior to sampling, which would component repertoires, tolerances, and costs. Any
otherwise fold (alias) high frequencies into the Fs/2 electrical performance achievable with oversampling
baseband, is achievablewithout it, although not necessarily at
the same cost or in the same implementation technology.
Further general background about antialiasing, sam-
pling, and quantization is available in Blesser' s exten- 1.2 "Cultures" of A/D Conversion

sive 1978 monograph on audio data conversion [1], One pervasive issue in the development and appli-
cation of OSADCs is more sociological than electrical.
and in many signals-and-systems and digital-signal-
processing texts such as Oppenheim and Schafer [11]. OSADCs by their nature cut across several traditionally
This paper addresses the common objective of linear
quantization with constant sampling rate. This is the separate specialties in electrical engineering. These
most widely applicable signal-acquisition format and
the basic starting point for digital signal processing specialties, for historical reasons, have evolved very
(DSP), for most audio storage and transmission systems,
and for more sophisticated source-dependent quanti- different, usually unstated, often unquestioned as-
zation schemes to reduce data rates [1].
sumptions about what precisely "analog to digital"
Oversampling denotes representing an analog signal
at a sampling rate deliberately above (often far above) means and, more particularly, what issues are important
its Nyquist rate. Often this is an intermediate step in
handling a signal destined for Nyquist-sampled rep- in OSADCs. Consequently the disparity of premises
resentation. A signal-acquisition system with over-
sampling takes the generic form of Fig. 2, in which discernible in the overall literature of OSADCs, al-
sampler and quantizer operate at the elevated rate DFs.
A commercial OSADC may realize this entire system, though rarely mentioned per se, is one of its prominent

Originally in this context the adjective "Nyquist" un- features.
ianmtebrivgaul"ous(loyr ecqouninvoatleedntltyhe Nsaymqupilsitngrastpe)acifnogr, saasmpinli"nNgyqsuoimste
analog signal. The terminology was introduced by Shannon Circuit-design, including IC-design, literature tra-
[5]. Some authors have begun applying the adjective instead
ditionally presumes that "A/D conversion" transforms
tthoethNeyqcourirset sproantedibnyg a afnaacltoogr obfantwdwo,idtbho,thwqhuiacnhtitdiiefsf,ersnefvroemr-
theless, bearing physical units of frequency. This has intro- an isolated analog sample into a digital number, in a
duced a sometimes crucial factor-of-two ambiguity into such
idioms as "a frequency near Nyquist.' The ambiguity can be manner describable by a staircase-shaped input-output
averted by further qualifying (or avoiding) references to
Nyquist"frequency." curve. 2 The focus is on implementations (counting,

flash, successive approximation); specific topologies

(D/A feedback, pipelined, recirculating remainder); and

fabrication-imposed constraints (array-element

matching, layout effects). This perspective embraces

many A/D converter applications beyond signal ac-
quisition. Representative are Gordon's A/D conversion

overview paper [2] the Analog-Digital Conversion

Handbook from Analog Devices [3], and most 1C-design

2 Communication theory would call this a memoryless de-
terministicuniformquantizer.

Fs CLOCK

i

LOWPASS [ Y QUANTIZE SEQUENCE

SANOAULROCGE ANFTIILATLEIARS SAMPLER "A/D"

4 Fig. l. Traditional signal-acquisition system with no oversampling.

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING/VD CONVERSION

texts treating data conversion, such as Grebene's [4]. The critical frequency Fs/2 is usually designed not far
Sec. 6 reexamines OSADCs explicitly from this context, above the maximum input frequency of interest FB to
avoid wasting digital data rate (examples are telephony,
Communication-theory literature pictures "analog- nominal passband 3200 Hz, Fs/2 = 4000 Hz; compact-
to-digital" interfacing both more generally and more disc audio, passband 20 kHz, Fs/2 = 22.05 kHz). The
abstractly, in terms of its mathematical effect on in- AA filter must pass frequencies below FB with flat
formation [6]-[12]. The classic communications mis- frequency response, suppress frequencies above Fs/2
sion of low-bit-rate transmission of signal sources with high attenuation, and roll offrapidly between these
heavily informs this perspective; reference to A/D two behaviors over a narrow transition band. Such a
conversion as "coding" or "encoding," or to the de- filter is a difficult part of a non-oversampling signal-
acquisition system even when the technology is available
cimator of Fig. 2 as a "decoder," bespeaks it. Here a to build it.
single-sample staircase curve describes only one narrow
class of quantizers [7], among others equally useful in 2.1 Antialiasing Without Oversampling
practical signal acquisition, such as quantizers whose Realizing a continuous-time low-pass filter (LPF)
error is inherently wide band, or is only statistically
with standard (lumped) elements entails two basic steps
known (such that any single sample may experience [ 13], [ 14]. First, the desired frequency response is ap-
error much greater than the average). OSADCs com- proximated with a Laplace-transform transfer function
monly display both attributes. having a finite number of poles and zeroes. The elliptic,
Chebyshev, and Butterworth approximants are examples
Other engineers view signal acquisition as chiefly a of different mathematical approaches to this step. Sec-
filtering issue because of the great practical difficulty ond, the resulting numerical pole and zero values are
of analog AA filtering. This approach stresses pole and implemented using electrical networks containing ac-
zero placement, frequency response, and filter imple- curate parameters with the physical dimensions of time,
mentations. It is likely to perceive the object of over- such as RC products. Successful contemporary examples
sampling as filtering rather than quantization [24]- of such networks are the generalized-impedance-con-
[26]. Among the sources with this perspective is a sub- verter (GIC)biquad sectionand the modified-leapfrog
literature, described in Sec. 6.3, that explicitly regards (MLF) ladder [13], [14]. Trade-off between the number
OSADCs as digital filters that happen to have "analog of poles (hence cost of manufacture) and the ideality
input."
ENERGY
Real OSADCs draw upon all of the foregoing tech-
nical perspectives and entail careful trade-offs between SIGNAL OF
them, even though much of the essential research occurs
within the confines of one or another of the contributing _ INTJEREST
cultures.

20VERSAMPLING TO FACILITATE ANTIALIAS FIRST I
FILTERING I

ALIA,.S.-'1"'5

Fig. 3 illustrates components in the frequency spec- N_ Y i
trum of a sampled and quantized (i.e., digitized) analog ]i
_ QUANTIZATION
signal. The sampling step is mathematically equivalent
_ ERROR J I

tsocawle raopf peixntgenttheFas,nawlhoigchfrereqpueeantscyoduotsmideainoifntthoisa ffiinniitete ___-'_ - }-- _ I -- __ - - - ---- FREQ.
0 Fa F ,
range of frequencies and, when plotted as in Fig. 3, is 2 Fs
symmetric about the midpoint F2/2. The analog AA
Fig. 3. Illustrating components in frequency spectrum of
filter of Fig. 1 must suppress any frequency components sampled and quantized signal. In this example the quanti-
above Fs/2 to prevent the emergence of aliased replicas zation-error spectrum is white.
below Fs/2 in the course of the sampling operation,

CONT. RATE RATE RATE

TIME DFs DFs Fs

r ........................... I r ........................... I

ANALOG I I_ QUANTIZE DIGITAL DROP
LOWPASS r_! LOWPASS RATE
_--'-E__ _ i_'_ .l
I ........................... J I ...........................

"AA FILTER.... SAMPLER .... MODULATOR.... DECIMATOR"

Fig. 2. Signal-acquisition system using an oversampling factor D, showing progression of sampling rates (above) and typical
nomenclature (below). Dashed lines around filter-and-resampler sections before and after quantizer emphasize their analogy.
Decimator limits digital signal bandwidth to Fs/2, permitting sampling rate to fall to Fs.

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 5

HAUSER PAPERS

of low-pass response (passband ripple, stopband re- 4). A continuous-time AA filter is still necessary, but
jection, and phase linearity) occurs in the approximation only for AA protection against the high initial sampling
step; second-order circuit behavior and technology rate DFs. The. large difference between the desired-
sensitivity reflect primarily the implementation step. 3
signal bandwidth and the new AA cutoff frequency
The implementation step is a major stumbling block DFs/2 means that the available transition bandwidth
in manufacturable AA filtering for audio and many
other applications. Standard IC fabrication processes for the filter is now many times its passband width,
do not support accurate, stable continuous-time time and this makes it much easier to realize the AA filter
constants (such as RC products) [15]. The traditional
alternatives have been nonstandard monolithic, or hy- with imprecise analog circuity. For example, if D =
brid monolithic-discrete, fabrication processes [16]- 100, a single (noncritical) pole of passive RC filtering
[18]. From a distant perspective these might appear will give some 40 dB of attenuation between passband
simple options, but to VLSI circuit and system designers and stopband edges.
they have the effect of excluding this one vital function
from implementation with the rest of signal acquisition In order to accommodate the same final sampling
and signal processing. The manufactured cost of signal rate Fs as before, the oversampled signal must be further
acquisition also then fails to realize the economies of filtered to suppress frequencies above FJ2, but this
existing and evolving mainstream IC fabrication, further filtering can occur digitally, after the signal has
been quantized, as in Fig. 2. In practice the digital
One promising approach to this problem within the low-pass filtering and the rate reduction occur simul-
mainstream silicon processes consists of the various taneously (which simplifies the digital arithmetic); the
analog schemes to stabilize and linearize nonlinear de- combination is popularly called a decimator [24]-[26].
vice (transistor) resistances or transconductances, The decimator therefore finally completes the sampling
combined with existing high-quality oxide capacitors operation of signal acquisition, to the target rate Fs.
[19]-[22]. This class of techniques has an extensive
history [23]. However, because of the difficulty of cor- Philosophically, sampling brings the time-domain
recting for actual device nonlinearities and variations, representation of a signal source down from continuous
large-signal harmonic distortion has generally been on to a coarseness of Fs (the lower limit being set by the
the order of 1%, relatively severe for high-quality audio, Nyquist rate for the source). Instead of effecting this
These techniques have been less broadly successful for change in one jump, with the AA filter and sampler of
the specific task of on-chip AA filtering than has over- Fig. 1, the OSADC of Fig. 2 does it in two steps,
sampling, whose philosophy is not to satisfy the need through a middle sampling rate DFs. Dashed boxes in
for high-quality RC products but instead to eliminate Fig. 2 emphasize that the functions of the analog AA
it. filter and sampler, and of the decimator, are closely
analogous [26]. OSADCs trade off complexity in the
2.2 Antialiasing With Oversampling analog dashed block for complexity in the digital block
Oversampling circumvents the need for a sharp-cutoff (anexchangeappropriateto thecapabilitiesandtrends
of lC technologies). Of course the quantization step
(and therefore precision-time-constant) continuous-time must now occur at a faster rate than in Fig. 1; but this
AA filter by sampling initially at an elevated rate DFs change is augmented by the capability of the oversam-
when the final sampling rate desired is still Fs (Fig. pling process to also simplify the quantizer, the subject
of the next section.
3 Confusion between these two steps is not uncommon,
owing perhaps to the pervasive label "filter." Thus "elliptic 30VERSAMPLING TO FACILITATE
filter" describes a pole-placement strategy, not a circuit to- QUANTIZATION
pology. Similarly a "biquad" accurately denotes a section of
filter with biquadratic transfer function_quadratic numerator Completely separate in motivation from AA filtering,
and denominator--rather than any specific circuit,
though overlapping in hardware, is the use of over-
sampling and decimation to increase a quantizer's ef-

FIRST I
ALIAS I
I

0 Fs 2Fs- I -- _ FREQ.
D2sF DsF

Fig. 4. Oversampling for AA filtering. A high intermediate sampling rate DFs in Fig. 2 permits magnitude response of analog
filter (dashed line at left) to roll off gradually.

6 J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING A/D CONVERSION

fective resolution. Intuitively, this process is a time- different from the 1.76 dB in Eq. (3) if its peak-to-rms
domain averaging by which the fast, coarse digital ratio differs from that of a sinusoid.
numbers from an oversampling quantizer (or "modu-
lator") in Fig. 2 are interpolated in level to yield a finer Thus, for example, an ideal 16-bit conventional linear
quantized, slower sequence; However, efficient ar- A/D converter exhibits a peak sinusoidal-signal SNR
rangement of the quantizer, to control the spectral shape of 98 dB (as does a practical 16-bit A/D converter
of the quantization error power in its coarse output, performing fully to implied specifications, which means
permits this error to "average out" more efficiently approaching the ideal staircase curve within an analog
than white noise, yielding more-than-intuitive resolution accuracy of one-half LSB weight, or one-half step size
enhancements through oversampling. [3], and exhibiting no further error sources to impair
SNR).
3.1 Quantization "Noise"
3.2 Dither for Non-Oversampling A/D
An ideal conventional (sample-by-sample, staircase-
curve) N-bit linear A/D converter operating on a "busy" Converters
input sequence x(n) of moderate amplitude (well above It is widely recognized that low-amplitude signals
the analog step size, or least significant bit (LSB)
weight, but smaller than the saturation limits) tends to can violate the preconditions of the AIWN quantization
introduce a wide-band quantization error resembling model. Dijkmans and Naus [89] have demonstrated
additive independent white noise (AIWN), as illustrated how conventional A/D converters with full ]/2 LSB
in the spectrum of Fig. 3. This observation motivates accuracy can, with low-level inputs, exhibit both highly
the common practice of approximating such an A/D correlated, nonnoiselike quantization error and quart-
converter mathematically as a source of AIWN [1[, tization error whose nature varies radically among
[7]-[9], [11]. Like other models, this one can be similar A/D converters due entirely to the different
treacherous outside the limits of its validity, as Gray possible forms of 1/2LSB error.
has recently emphasized [12]. The terms noise and
noise shaping are used broadly in this paper to reflect On the other hand the ideal of wideband, noiselike
current OSADC practice, even with 1-bit quantization quantization error can be forced, to some extent, from
error, whose nonrandomness and signal dependence a conventional A/D converter by adding some form of
are widely recognized. These terms should not be con- dither signal to the analog input [27]-[33]. This forces
fused with the AIWN model, the A/D converter's input to be "busy." Sometimes the
dither component is subsequently subtracted out dig-
The AIWN model itself is nevertheless a pervasive itally [27[, [30] when the dither waveshape permits
reference point and accurate in the context cited. It accurate simultaneous generation in both analog and
predicts a ratio of signal to noise powers (SNR), at the digital forms. The idea of dither in A/D converters was
output of an ideal N-bit linear A/D converter, of articulated in detail by Roberts [27] and Schuchman
[28] and has since been studied extensively in the context
of digital audio [31]-[33]. It also resembles the use
of smoothing oscillators, a venerable analog-computer

SNR= (//2\)22L/NAAmia-s1/2 (1) adtericetihonnsioaqmlueewoph[tai2to9n]s.difIfnaerriesonevte,rfsoaramspdldiitenhsgecrriinbgeAd/DbuintcoSintevsce.rotbe4rj.es2,c.t7iv. easd-

with sinusoidal signal, where A is the (zero-to-peak) 3.3 Generalized "Resolution" Measures
input sinusoid amplitude and Ama x is the maximum
input amplitude of the A/D converter, Conventional reference to an A/D converter resolution

This SNR reaches a maximum value when the sinusoid of N bits is meaningful and self-explanatory with an
ideal linear-staircase A/D converter. The situation
amplitude just fills (saturates) the converter's input
range (A = Amax) so that as a power ratio

SNRma x = 2 2N (2) ERROR POWER

or, in decibel form, as it is more usually expressed, SNRmax "-_ '_"

SNRmax(dB) _ 6.02N + 1.76. (3)

Still larger input amplitudes will cause the A/D converter SIGNAL LEVEL, dB
to saturate (limit). The character of the output error
changes,but in anyeventthe SNRfalls off as shown Fig. 5. Representative curve of SNR versus signal level for
qualitatively in Fig. 5. linear quantizer.

Eq. (3) is a frequently cited rule of thumb. A signal
waveform other than a sinusoid yields an additive term

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 7

HAUSER PAPERS

complicates, however, with more general quantizers, 0-70°C commercial temperature range) or a junction
which may exhibit statistical, or highly signal-depen- current down to 83 IxA, assuming that either was the
dent, quantization error. Also, when low-order bits sole source of noise. At 22 bits these constraints become
contain only noise or distortion, then a total A/D con- 0.6 IxV, a maximum of 310 _, and a minimum of 340

verter output bit width does not meaningfully gauge mA (impractically large for many small-signal tran-
"resolution." This is important with OSADCs, whose sistors). The foregoing incidentally implies that the
output emerges from digital filtering and may exhibit circuitry of a real data converter must considerably
a convenient digital-logic width, or residual filtered exceed these constraints in order to accurately support
noise, the specifiedresolution.

On the other hand, SNR performance, as illustrated From a complete SNR-amplitude relationship, as
in Fig. 5, applies much more generally than does a in Fig. 5, various single dB parameters can be picked
sample-by-sample staircase curve. Noise may again be off. Some used in the literature to concisely characterize
defined broadly to capture all error at the quantizer a practical quantizer follow:

output other than dc and linear errors ( a measure also 1) SNRmax, as described, is perhaps the most pes-
straightforward to instrument in hardware or simulation simistic performance measure since not all applications
[65]). The resulting, stringent SNR measure is some- depend on peak SNR, yet many electrical aberrations,
times called the ratio of signal to error, or to the sum such as nonlinearity, will limit it.
of noise plus distortion. Any deviations from ideal
quantizer behavior (such as nonlinearity, step-size im- 2) Perhaps the most optimistic single-number measure
balance, dynamic error, harmonic distortion, physical is the range of input levels yielding SNR above 0 dB
noise, or interfering signals) will impair such an SNR (the versatile term dynamic range is sometimes defined
this way). A variant is to specify an SNR minimum
curve. 4Different quantization processes useful for audio
then exhibit "equivalent N-bit resolution" in an etec- maintained over a range of input levels (for example,
40 dB over 50 dB).
trically rigorous sense if their SNR equals that of an
ideal N-bit linear-staircase A/D converter with the same 3) Idle-channel noise, the quantizer's noise output
signal, (often in decibels below maximum signal output) with
negligible signal input, is also used (and abused, since
An SNR curve as in Fig. 5 actually arises in many
analog components as well, when they contain a physical in general a quantizer may behave differently with large
noise source [34], [35] in the presence of a signal- and small input signals).
amplitude limit. Comparing analog-noise and quanti-
3.4 Elementary Oversampling and Decimation
zation SNRs in unified terms illuminates the magnitudes
of electrical accuracy implicit in high-resolution audio The spectrum in Fig. 3 showed quantization noise
A/D conversion, as follows,
occupying the same frequency range as the analog signal
Consider an analog signal with a bandwidth FB of
20 kHz and a maximum (peak-to-peak) voltage excur- of interest. In contrast, Fig. 6 shows quantization oc-

sion of Vpe. Then the same SNR ceiling imposed by curring at an oversampled rate DFs, where again Fs/2
ideal N-bit linear A/D conversion occurs from either is the analog bandwidth of interest. A conventional N-
the thermal noise in a series resistance of value
bit A/D converter used as the quantizer in Fig. 6 will

introduce a total quantization noise power corresponding

to its resolution, but independent of the sampling rate.

A higher sampling rate will spread this power over a

V2p wider range of frequencies. Subsequently filtering out
Rmax - 48kTFB(22N )
(4) frequencies above Fs/2 with a digital low-pass filter

(the dashed line in the spectrum) will reduce the quart-

or the shot noise in a single pn junction (or for that tization noise power, effectively increasing the reso-
matter, a vacuum tube) carrying a forward direct current
approximately lution of the quantizer. The digital filter can again be

a decimator, since the sampling rate can drop to Fs

once spectral components above Fs/2 have been removed

/min ---= 6qFB(22N) (5) from the signal path.

This resolution-enhancement process is notoriously

where k is Boltzmann's constant, T is absolute tem- counterintuitive for data-converter users and designers
perature, and q is electron charge,
accustomed to dc staircase curves. The added resolution
If Vpp is 5 V, 16-bit linear quantization implies a
staircase-converter accuracy of about 38 txV. In pure arises, in effect, from the digital arithmetic in the dec-
analog hardware the same SNR requirement would
permit a series resistance of up to 1.3 MI2 (over the imator, which must consequently have adequate bit

widths to accommodate an output word wider than its

input (shown schematically in Fig. 6). Note also that
this process presumes wide-band (though not necessarily

random) quantization error. It is possible to contrive

4 This paper addresses only electrical characterization of pathological situations, such as an ideal staircase A/D
OSADCs. Perceptual fidelity measures, a large and appli-
cation-dependent topic, are of course the ultimate figures of converter with dc input and no dither, that will gain
merit in audio and other human-interface encoding [9].
no resolution from this technique.
8 With the oversampling and decimation factor D in

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING A/D CONVERSION

Fig. 6, 5 and white quantization noise from the quantizer, Half a bit per octave may be useful in practice for
a perfect (ideal low-pass) decimator will reduce the slight gains in A/D converter resolution, but it is a less
quantization noise power by a factor of D while leaving than linear trade-off. To achieve, for example, an en-
the signal power unaffected. This means that the SNR hancement of 10 bits requires an oversampling factor
enhancement through this process, expressed as a power D of one million (L -- 20 octaves). From Fig. 6 and
ratio, is the foregoingdevelopmentit will be apparentthat the
half-bit-per-octave figure derives from the flatness of
SNR enhancement = D . (6) the noise spectrum introduced by the quantizer. Ar-
ranging for this spectrum to be high pass instead--
Accordingly when the quantizer of Fig. 6 is an N-bit that is, with most of its power outside of the base-
linear A/D converter, the peak SNR in decibels for a band--yields a higher SNR gain from the oversam-
sinusoidal signal, as in Eq. (3), becomes piing-decimating process. This is the objective of noise
shaping.
SNRmax(dB) _ 6.02N + 1.76 + 10 logl0 D .
(7) 3.5 How Noise Shaping Works
Fig. 7 illustrates a basic noise-shaping feedback loop.
It is also convenient to write D = 2r, so that L is the
number (not necessarily integer) of octaves of over- Allowing for variations in the H(z) block and the internal
sampling. Then Eq. (7) can be rearranged, A/D and D/A blocks, Fig. 7 underlies the majority of
OSADC designs in current use. This section outlines
SNRmax(dB) _ 6.02(N + 0.5L) + 1.76 . (8) the method; the following section analyzes its per-

Eq. (8) shows directly that the oversampling A/D con- formance.
verter yields baseband SNR equivalent to that of a non- In Fig. 7, H(z) denotes the transfer function of a
oversampling converter with a higher number of bits,
in this case a trade-off of 0.5 bit per octave of over- discrete-time analog filter [11].6 At minimum, this H(z)
sampling.
block is a discrete-time integrator (an analog accu-
5 A few authors define an "oversampling factor" as the mulator), as described in the time domain by the
ratio between initial sampling rate and final analog bandwidth,
rather than final sampling rate. Under that definition, sampling 6 The H(z) block is specified most naturally in discrete-
an analog source at the minimum, or Nyquist, rate is termed time form since the loop of Fig. 7 operates inherently in
2:1oversampling, discrete time. Continuous-time integrator circuitry is some-
times used, at the cost of introducing an additional clock-
period dependence in the behavior of the loop [65] and a
dependence on exact analog waveshapes, absent from discrete-
timecircuitry.

D%

BANDDFsW/2IDTH BANDFsW/2IDTH

MODULATOR DECIMATOR
ENERGY

li]_l SIGNAL
Q. ERROR AT

MODULATOR OUTPUT

FREQUENCY._

0 Fs %

2 2

Fig. 6. Oversampling for resolution enhancement.

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 9

HAUSER PAPERS

input-output difference equation

v(n + l) = v(n) +' u(n) . (9) 3.6 Basic Noise-Shaping Theory

The H(z) filter and the internal N-bit A/D and D/A Within the limitations of the additive-independent-
converters in Fig. 7 all operate at the oversampling noise approximation for the quantization in the internal
clock rate DFs. A/D block, a model like that in Fig. 8 accurately predicts
the error spectrum and resulting SNR of the topology
Because the analog input sequence x(n) has been in Fig. 7.
oversampled, its value will change only slowly com-
pared to the DFs clock rate. One way to view the be- The following analysis applies to OSADCs that over-
havior of the loop in Fig. 7 is that the A/D and D/A sample and decimate by a factor of D, with a decimator
blocks form a fast-changing coarse approximation y(n) sufficiently ideal so as not to limit the converter's SNR.
that oscillates around the slow-changing value ofx(n), A general formulation that includes Figs. 7 and 8 but
The integrator will constantly force this approximation applies to other configurations as well begins with a
to move in a direction bringing the integrator's own generic expression of the modulator's output z trans-
form,
input u(n) toward a long-term average of zero, as in
other integrating feedback loops, such as regulators or Y(z) = Fx(z)X(z) + FQ(Z)Q(z) (10)

phase-locked loops. Consequently the dc error between where Fx(z) is some signal transfer function and FQ(Z)
analog input x(n) and digital approximation y(n) will some noise transfer function, which link the output to
approach zero. the signal input and to the source of quantization noise,

Cutler, inventor of record for this process, described O(Z)
(in 1954) the action of such a loop as [36]

· . . modifying each [y(n)] sample in a manner to

triezsautliton of ocfotmhepenimsamtioedniateliyn thpisrecmedainnnger siasmtphlaet. thTehree X(z)-_ -! H(z) _,-Y(z)
cisomlittpleenDsa.-tCe.foerrrtohre einrrtohre a[sys(no)c]iasteigdnwal,iththtehepoqwuearn- -/
frequency spectrum of the quantizing error sloping I / _+l +_
upward with increasing frequency.
Fig. 8 shows a linear feedback system analogy for INTEGRATOR
the loop in Fig. 7, based on the additive quantization-
error model. X(z) and Y(z) denote z transforms of the H(z) 1
Y(z) - 1 +_z) X(z) + _I + H(z) Q(z)
qcourarnetsipzoatnidoinng pesrfeoqrumenedces byx(nth)e ainndteryn(anl) Ain/DFigc.on7v.erTtehre
in Fig. 7 appears in Fig. 8 as an additive error signal r ' -_ r- _,
Q(z) (a "disturbance" input, in classical control theory). GAIN GAIN
The figure illustrates how a low-pass frequency response
in H(z) causes white quantization error Q(z) to produce 3t /
a high-pass error spectrum at the loop output.
\ FREQ.
Finallythedecimatorin Fig.7 suppressesfrequencies _,
above the baseband of interest, excluding the quanti- FREQ.
zation error in those frequencies as in the white-noise
Fig. 8. Linear feedback-system analogy for noise-shaping
case of Fig. 6, to yield a finer resolution digital replica loop of Fig. 7. Q(z)--quantization error from internal A/D
of the analog input, but at a reduced sampling rate Fs.
converter.

(RATE DFs) (RATE Fs)

SAMx(PnL)ED._!_ H(z)v_ N.BiTA/D __ DECIMATOR BITS
ANALOG > N+M

INPUT N BITS

N-BIT D/A
Fig. 7. Generic noise-shaping feedback loop. Block H(z)--discrete-time analog filter containing one or more integrations.

10 J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING ND CONVERSION

respectivelyfi For the class of circuits in Figs. 7 and general form, this power ratio is

8, with a single loop filter H(z), these transfer functions dh
are f,/D [Fx(eJX)12 Sx(X)

J0 (14)

H(z) (lla) SNR - Pb_ _ '
Fx(z)- 1 + H(z) P0. I '/° [FQ(eJX)[2 SO(X) dh
Jo

With the topologies in Figs. 7 and 8, exhibiting the

1 (l lb) signal and noise transfer functions of Eqs. (1la) and
FQ(Z) - 1 + H(z) (1 lb), and with white quantization noise from the in-

ternal A/D converter [making SQ(X) a constant], Eq.

Using a random-signals formulation [11], the analog (14) becomes

ifnrepquutensciygnalacchoardsingsomteo atoptoalwepr owspeerctrPalx ddeisntsritbyute(dPSDi)n 12f]=/OlH(eJX)/[1 + H(eJX)] Sx(X) dX
Sx(h), while the source of quantization noise in the
system has power Pq and power spectral density SQ(×), JO
normally but not necessarily white. Here k is the nor-
malized frequency variable for discrete time, taking SNR - _/o
the range 0 to 2,r, where 3, = 2xr corresponds to a
physical (hertz) frequency equal to the current sampling Pq [ [1/11 + H(eJX)l2] dX
rate.
JO
In general the system described by Eq. (10) may
frequency filter the signal input as well as the quanti- (15)
zation noise; both must be considered. From Eq. (10),
at the modulator output y(n), the signal-component To furtherevaluatetheOSADC'soutputSNRrequires
PSD Srs(h) and the noise-component PSD Syn(k) are
knowledge of the specific loop-filter function H(z).
For a simple example, let this filter be the unity-gain
discrete-time integrator described in Eq. (9). Its in-
put-output z transform is

2 -1 (16)

H(z) - I - z -1 '

Sy_(X) = [Fx(eJX)12Sx(X) (12a)

SYn(h ) = [FQ(e jx) [2SQ(h) . (12b) Such an H(z) function yields a basic first-order noise-
isshatphienng loop. From Eq. (11 a) the signal transfer function

Now the total signal power and noise power in y(n) H(z) - z -1 (17)
over the baseband of interest (the range of frequencies 1 + H(z)
that will pass through the decimator) are, respectively,
while the noise transfer function of Eq. (1 lb) is
1
Pbs 'Ir Jf_Or/D SYs(h) dX 1 (18)
- 1 - z -l

1 + H(z)

= 1 f_/D iFx(eJX)[2 Sx(h) dh (13a) Note that the signal transfer function, Eq. (17), is
(13b) the z-transform expression of a pure delay (with unity
'Ir .Jo magnitude for z = ejx) while the noise transfer function,

P bn = _"I1T f SYn(h) dX Etimqe. (d1o8m)a,inis, aafifrirsstt--oorrddererhdiigffher-epnacessreospperoantosre).(inItthise
easy to show that the frequency-response magnitude
v/'ttr)/O of this noise transfer function, at normalized frequency

= 1 i_/O [FQ(eJX)12SQ(h) dh . is
k,
'ir J0

The ratio of these two baseband powers is the output i1 + H(eJX) I - 2 sin . (19)
SNR of the oversampling A/D converter. In its most
(Single-zero, or first-order high-pass, frequency re-
acc7oEmxmporedsasteinsg atnhyesOe StAwDoCtraannsafleorg ftuonpoctlioognys, isnudcehpeansdaenltoloyp sponses for discrete time from h -- 0 to h = ,r look
where the H(z) block is split into multiple pieces with multiple like the first quarter of a sinusoid. The corresponding
feedback paths, a minor and common variation of Fig. 7. high-pass response magnitude in continuous time would
be linearly increasing with frequency.)
J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February
11

HAUSER PAPERS

From Eq. (17) the numerator of Eq. (15) simplifies Comparing these results with Eqs. (3) and (8) reveals
to that first-ordernoise shapinghas boostedthe oversam-

Sx(X) xP x (20) pling payoff in equivalent A/D converter resolution to
per high-pass
fo_/° dh =
s1h.5apbiintsgin theocqtauvaen. tizInactrieoasninnogiseoprrdeerssenotef dto the de-
where Px is just the original analog-input-signal power, cimator (as in Fig. 9) will tend to increase this resolution
[This signal is in the baseband and therefore Sx(M is
zero above h -- w/D. ] From Eq. (19) the denominator payoff· Note also, however, from Eq. (24) that a fixed
integral in Eq. (15) is -5.17-dB loss in SNR [corresponding to the multi-
plicative factor 3/x 2 in Eq. (23)] accompanies the first-
order noise shaping, unlike the white-noise oversam-
pling system of Fig. 6. This is because the noise-shaping

folio 11 + H1(eJ×)[ 2 dh = 4 _Jo,,/D sin 2 (__) dh lqouoapntidzaetsicornib-nedoiseby Eqssp.ec(t1rulma) anwdith(1 lab),siminplaelteritnragnsftehre
function, also boosts its total power. This effect too

becomes more pronounced as the order of the noise-

= 2ID sin (D) ] · shaApintygploicoaplgrsoewcso.nd-order noise-shaping loop [63], [65]
(21) yields results paralleling the previous analysis. The
gain magnitude from the signal input is again unity,
With these results the power-ratio SNR at the OSADC
output, from Eq. (15), is and in power terms,

23SNR = Px x/2 (22) 6_/D - 8 sin (T/D) + sin (2x/D)
w/D - sin (T/D) (26)

The first factor, Px/Pq, is just the SNR that would For D >> 'rr,
result if the same internal A/D converter operated di-
rectly on the signal input x(n) with no oversampling. 5D 5
Thus the remaining factor in the right-hand side of Eq. SNR enhancement _ _- (second order) . (27)
(22) is a net SNR enhancement attributable to the over-
Again expressing the oversampling factor as L octaves,
sampling-decimating process with the topology of Fig. so that D = 2L,
7 and the particular loop filter of Eq. (16).
SNR enhancement (dB) = 15.05L - 12.90 .
Eq. (22) entails no assumption about the magnitude (28)

of the oversampling factor D. However, for large over- With sinusoidal input and N-bit linear internal con-
verters,
sampling factors D > > w, the [x/D - sin (T/D)] term
is accurately approximated using a Taylor expansion

of the sine function, and this yields a simplified
expression for the SNR enhancement in Eq. (22). In
power-ratio terms,

3D 3 SNRmax(dB) -= 6.02(N + 2.5L) - 11.14 (29)
SNR enhancement _ _7 (first order) .
(23)

ENERGY

As in the earlier SNR enhancement analysis, expressing SNEOCISOENSDH-OARPDINEGR
the oversampling factor as L octaves, so that D -- 2L, ] / FIRST-ORDER
gives a convenient decibel form of this result:

SNR enhancement (dB) = 9.03L - 5.17· (24) "'_ .ql(l, // NOISE SHAPING
\_._NAL
The specific case of a maximum-amplitude sinusoid

input signal, which in Eq. (3) yielded a maximum SNR

of 6.02N + 1.76 dB from an N-bit linear A/D converter NO NOISE

in the absence of oversampling, will now achieve a _ [ SHAPING
maximum SNR of --_-'"'"_ I '"

FREQUENCY

SNRmax(dB) = 6.02(N + 1.5L) - 3.41 (25) -_,IBASEBAND!-"_--

when the same N-bit A/D converter is embedded in the Fig. 9. Spectra of signal and quantization-error components
noise-shaping loop of Fig. 7. in oversampled quantized signal y(n) for frequencies in vicinity
of signalbaseband.
12
J. AudioEngS. oc.V, ol.39,No.1/2,1991January/February

PAPERS OVERSAMPLING A/D CONVERSION

or an equivalent SNR payoff of 2.5 bits per octave with from the actual digital filter coefficients [70]).
a fixed - 12.9-dB or approximately 2-equivalent-bit 2) Finite tolerances in the definition of the D/A output
SNR penalty,
points in a multibit OSADC loop like Fig. 7. This
Thus for example, to increase the SNR of an N-bit introduces a slope-matching issue that can cause large-
A/D converter by 10 equivalent bits (60.2 dB) with signal distortion in the OSADC. Sec. 4.2 treats this
this second-order loop would require, from Eq. (28), crucial subject in detail.
L = 4.857 octaves or an oversampling factor D of 29.
The precise expression, Eq. (26), yields 60.22 dB of 3) A gamut of standard electrical imperfections in
SNR enhancement with 29:1 oversampling. Fig. 10 the analog components that make up the OSADC front
summarizes typical SNR enhancements as a function end. Prominent in practice are noise sources in the
of oversampling factor D for noise-shaping orders of subtracting (Y,) and H(z) blocks, nonlinearity sources
zero, one, and two. (Higher orders are considered in and finite coefficient accuracy in the H(z) block, and
Sec. 4.) technology-dependent effects such as parasitic coupling
and 1/f noise [65]. Some of these aberrations can be
Such linear additive-noise analyses are the basic an- predicted analytically; most require simulation and some
alytical tool to date on oversampling for resolution cannot even be simulated accurately. The majority of
enhancement. Although presented here in a unified form fully-integrated OSADCs today use MOS switched-
with contemporary signal-theory notation, the under- capacitor analog circuits, for which technology-linked
lying method dates at least to Inose and Yasuda in 1962 ultimate speed and resolution limits can be derived
[55],[56]. [731.

3.7 Practical Imperfections in Noise-Shaping SNR in high-resolution OSADCs has consistently
OSADCs been limited by these practical electrical aberrations
rather than by noise-shaping theory.
Fig. 10 and others like it, showing the calculated
4 ALTERNATIVE APPROACHES TO NOISE
impact on SNR of oversampling with noise shaping, SHAPING
are best-case results, which presume idealized modu-
lator components and perfect low-pass decimation. 4.1 "Interpolative" A/D Converters [39]-[46],
Implementating this signal-theoretic process with real [48]
hardware introduces nonidealities, any one of which
may constrain the actual resolution of an OSADC: To the relatively low-frequency analog input signals,
the overall analog-digital transformation in Fig. 7 can
1) Imperfect suppression of out-of-baseband quan- be viewed roughly as a set of coarse A/D mapping
tization noise by the decimator. This is a key issue in points established in the modulator, followed by in-
practical decimator design [64], [70]. Increasing sup- terpolation between them, through the time-averaging
pression is increasingly expensive, so an economical process in the decimator (Fig. 11). These concepts
decimator design will be only as "perfect" as the ap- underlie the term "interpolative" data converter, applied
plication requires. On the other hand, any out-of-bas- originally (and still occasionally) to oversampling data
eband quantization noise from the modulator that passes converters in general [39], [40], [48].
through the decimator will lower the SNR at the A/D
converter output (to a value that can be easily calculated The label "interpolative data converter" is, however,
now widely associated with a special subclass of these
circuits developed by Candy and Wooley [40], [41],

100 , ' Rxg'/.c _ .J ' 4+16 BITS the analog-digital plane of Fig. 11 is the internal N-
m _,bl"'_'' ._+14 BITS [43]-[46]. The actual source of the anchor points in
'o 80 _ bit D/A block in Fig. 7. Accordingly an OSADC can
,o_ 4+12 BITS be built with an N-bit D/A element, but without a

IZ'_ .0_.0_..__,;,,, ix?,_j,,,,,_

LU 60 _,,r.,Oy _Os, <¢_ O

Z '*

Z-Or 40 _y __?_.f ,.,' .e

Ltl ._*

z 20 .': : , : :
u') ,,.'*
.f A

0 ! !I I e°

16 32 64 128 256 512 ..'

OVERSAMPLING FACTOR "D" e"

Fig. 10. Theoretical enhancements in A/D converter signal- Fig. 1l. Interpolation between coarse analog-digital mapping
to-quantization-error ratio (SNR) through oversampling-dec- points, which are defined by internal D/A converter in Fig.
imatinpgrocess. 7.

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 13

HAUSER PAPERS

matching A/D circuit, using instead some simplified Their popular name is delta-sigma or sigma-delta
means to estimate the H(z) integrator output and close A/D converters, 8 after the 1-bit, oversampled, noise-
the loop. The method of Candy and Wooley was to shaped delta-sigma modulation of Inose and Yasuda
sense only the pola¥ity of the integrator output. This [55], [56]. Historically, the explicit use of noise-shaping
controlled an exponential digital growth or decay, which oversampling began in multibit form, both for source
in turn drove the feedback D/A converter. In this system coding in the 1950s [36] and for integrated-circuit
the quantization of y(n) grew coarser or finer according A/D converter implementation in the 1970s [39]-[41].
to the amplitude of the analog signal x(n), a fact reflected In both contexts, 1-bit forms became prominent later
in the SNR- amplitude curve for these data converters, in practical implementation [55], [56], [59], [60], [62].
characteristically flatter than that of Fig. 5, as the
quantization noise varied up and down with the signal 1-bit OSADCs differ significantly from multibit ver-
amplitude. This method, with a 1-bit A/D and multibit sions in the following ways.
D/A converter, may. be considered a hybrid between
the pure multibit OSADCs analyzed in Sec. 3.6 and 4.2.10versampling Factor
the pure l-bit OSADCs of Sec. 4.2. Other aspects (such as noise-shaping order) being

Unfortunately, discerning the exact meaning of "in- equal, OSADCs that "start with" only 1 bit of resolution
terpolative data converter" is often the reader's task, will require a larger oversampling factor D to achieve
since many authors understand the term to mean only a specified final resolution.
one or the other of the two categories mentioned, and
hence use it as though unambiguous (in exactly those 4.2.2 Analog-Circuit Implementation
situations where the distinction is important). A separate It is much easier to realize "good" 1-bit internal A/D
and worse confusion also arises with the DSP idiom
interpolator, a digital filter that is the reverse of a and D/A elements in Fig. 7 than multibit elements, in
decimator [24]-[26]. The DSP sense of interpolation most solid-state technologies. (It is, so to speak, much
is a purely digital operation with a completely different more than twice as easy as building comparably "good"
objective. Unfortunately both senses of interpolation 2-bit elements) [62], [65], [73].
entail producing some type of new values between old
ones (and moreover, oversampling digital-to-analog 4.2.3 Unlimited Potential SNR
converters use both kinds of interpolation simulta- When the input to the decimator is only 1 bit wide,
neously, for different purposes), which is not very
helpful to the newcomer. the potential resolution is theoretically unlimited in
the OSADC, from the absence of the slope-matching
4.2 1-bit, or delta-sigma, OSADCs [55]-[76] issue characteristic of multibit OSADCs [65].
In view of the large A/D converter resolution eh-
Fig. 11 showed interpolation between precisely
hancements possible through oversampling (Fig. 10), aligned analog-digital mapping points and neglected
a natural option is to start with l-bit internal A/D and the inaccuracy of these points inevitable with finite-
D/A elements in Fig. 7, obtaining most of the final tolerance analog components. Fig. 12 illustrates the
OSADC resolution through the oversampling-deci- effects of finite errors in the D/A output values, for
mating process. This approach imparts both practical both multibit and 1-bit oversampling. The effect in the
benefits and theoretical complications, elaborated multibit case is nonlinearity in the interpolated transfer
hereafter. Many versions of 1-bit oversampling noise- curve, while in the 1-bit case it is dc offset and gain

shaping OSADCs exist, identifiable unambiguously by 8 The correct (and in initial years, the only) idiom is
the bit width of the digital signal entering the decimator, delta-sigma, coined and popularized by Inose and Yasuda.
Candy, present at the origin of the Bell Labs variant "sigma-
delta," has recently corroborated this [75], [76]. Other var-
iants, such as "sigma-sigma-delta," are seen occasionally.

D ,e D
m
/ o '_
e_

..w' A / -' A

O* O*

ee [ _eeee

(a) (b)

Fig. 12. Effect of finite accuracy in output values of internal D/A converter in Fig. 7. (a) Multi-bit OSADC, showing slope
mismatch. (b) 1-bit (delta-sigma) OSADC.

14 d. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING A/D CONVERSION

error, which in most signal-acquisition applications is oryless mapping f(v). (For a 1-bit quantizer this is a
more benign. Thus, for example, if a technology permits signum function.) The feedback loop is described ex-
component matching sufficient to realize an 8-bit half- actly in the time domain by a nonlinear time-invariant
LSB-accurate D/A converter, and this is embedded in (NTI) difference equation of the form
the loop of Fig. 7, oversampling and decimation might
yield a small-signal resolution of 16 bits, but large y(n + 1) = f(h(n) * [x(n) - y(n)]) (30)
signals, or large and small signals together, will en-
when the D/A block is ideal, here a minor assumption.
counter the nonlinearity illustrated in Fig. 12(a), for a Here h(n) is the impulse response corresponding to
net peak SNR of only roughly 8 bits. 9 The same tech- H(z) [11], and the convolution operator * embodies
nology applied to a 1-bit OSADC would still yield an the effect of the loop filter (expressible alternatively
absolute overall accuracy of only about 8 bits, but the as an additional difference equation).
error would take the form of offset and gain.
Eq. (30) or its equivalent can be calculated numer-
4.2.4 Decimator Design ically for the successive output samples y(n) under a
When the input to the decimator is only 1 bit wide, particular input sequence x(n). This procedure is exact
for the input sequence and loop parameters used; hence,
this can greatly simplify the digital filter arithmetic arguably, it is not a simulation in the usual sense, in
and hence the implementation of the decimator [70]. which finite-element models simulate continuous media,
In particular, a finite-impulse-response (FIR) first stage
in the decimator, often desirable for other reasons as or circuit simulators approximate continuous time.
well, requires no full multiplications, since FIR arith- However, it does not generalize to different inputs or
metic can be arranged with an input sample as a factor loop parameters and so must be repeated many times
in every product, under different conditions in order to be useful. This

4.2.5 Analysis and Simulation is the most general and successful method to date for
The AIWN quantization-error model of Sec. 3.1 for predicting the actual behavior of 1-bit OSADCs. With
provisions for modeling nonideal components that ac-
the internal N-bit A/D block in Fig. 7, quantitatively tually realize Fig. 7, it also has underlain the study of
accurate under specific conditions forN > 1, collapses circuit requirements and tradeoffs essential for building
completely whenN = 1 [62], [69], [70]. Much literature OSADCs in IC technologies [65], [68], [71].
on 1-bit oversampling notably neglects this vital point.
Efforts toward direct, exact analysis of filter-and-
Analyses based on additive white noise (as in Sec. quantizer loops such as that of Fig. 7 focus on the
3) can still reveal some OSADC properties when N = properties of the underlying difference equation, Eq.
1. But they fail to predict highly correlated quantization (30). This is a subject of active research [12].
error in the loop with certain input signals. This can
produce oscillatory error (limit-cycle tones) in the final PEAK

OSADC output (discussed further in Sec. 4.2.7) which SNR , , ' /' 20 BITS
is extremely objectionable in audio. The AIWN model 120 dB _·
also overestimates ultimate SNR capability for 1-bit
OSADCs even under the most favorable input condi- / · 16 BITS
· 12 BITS
tions. The often quoted linear-loop N-bit oversampling 90 dB _ 8 BITS
60 dB _ _
SNR analysis, summarizedin Eq. (29) for a second- 30 dB _ /·
order loop, predicts a peak SNR of 100 dB when N = ·

1 with 128:1 oversampling. The observed value in near- "
ideal circuits and careful simulations [70] is actually
about 86 dB; the linear-loop model overestimates peak ·
SNRs by about 14 dB with second-order noise shaping
(Fig1. 3). ,,,,
8 32 128 512
The fundamental difficulty in analyzing the loop of
Fig. 7 when N = 1 is that it contains both a linear filter OVERSAMPLING FACTOR "D"
with memory [the H(z) block] and a gross nonlinearity
zFaigti.on-1n3o.isEexammpoldeel ooff qSueacn. ti3ta.6ti,vewheernrorresionluatidodnitivoef-qinutearnntai-l
(the 1-bit quantizer). While 1-bit loops are extremely A/D and D/A converters is only 1 bit. Plot shows peak base-
useful in practice, established engineering mathematics bandSNRas a functionof oversamplingfactorfor repre-
lacks the means to analyze them generally in closed
sentative second-order delta-sigma modulators as in Fig.
form, and work proceeds instead from experiment and 14(c). Dashed line is prediction using linear-additive-noise
simulation, model of N-bit internal quantization, with N taken as 1, and
sinusoidal input. Dots are SNR values computed directly
In Fig. 7 the essential nonlinearity resides in the from nonlinear difference equation, Eq. (30), under same
conditions [65], and represent limiting SNR achievable in
internal A/D block, describable at minimum by a mem- practice. Linear model overestimates this peak SNR by some
14 dB.
9 On the other hand, Larson, Cataltepe et al. have explicitly
addressed this problem through digital correction of the D/A
nonlinearity [51 ]- [53].

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 15

HAUSER PAPERS

4.2.6 Practical Topologies where Vsup is the total power supply voltage, Cs the
Fig. 14 shows some low-order delta-sigma-modulator size of the input sampling capacitor, and again k is
Boltzmann's constant, T absolute temperature, and D
(DSM) [opologies with the discrete-time analog loop-
filter configurations explicit. Each of the small feedback the oversampling and decimation factor.
loops with a delay and a summation is a discrete-time
analog integrator. Figs. 14(b) and (c) illustrate the 4.2.7 Limit-Cycle Tones and Dither
common option of multiple-section loop filters with Even with ideal analog components, low-order, and
multiple feedback paths, noted in Sec. 3.6. (This option,
electrically equivalent to a single feedback path plus especially first-order, 1-bit noise-shaping loops are
a separate prefilter on the x(n) input, allows more flex- prone to output quantization error that is deterministic
ibility than the single-filter single-feedback configu- or oscillatory rather than noiselike. This again manifests
ration shown in Fig. 7.) In an OSADC, each of these the non-AIWN character of 1-bit quantization. Under
modulators would be followed by a decimator, as shown certain dc and small amplitude signal inputs, the binary
in Fig. 7 with a multibit modulator, idling sequence at the DSM's digital output will exhibit
a long and often complex, but repetitive, pattern. If
Both the modulators in Fig. 14 and their more com- the period of this pattern is long enough, its fundamental
plex, higher order variants rely on a subtracting-inte- frequency component will lie in the audio baseband
grator front end. The fundamental ability to perform and pass through the decimator unattenuated, yielding
this function accurately using combinations of switches, a limit-cycle tone or "birdie" in the OSADC output,
capacitors, and high-input-impedance amplifiers un- whose frequency typically depends noticeably on slight
derlies the relative success of the MOS technologies changes in the modulator's operating conditions. Inose
at realizing DSMs [65]. Similarly the practical analog and Yasuda called attention to this issue in 1962 in the
limitations in OSADCs typically stem from the com- original work on "delta-sigma modulation" [55], [56].
ponents that make up this subtracting-integrator front
end [65], [68], [71], [73]. For example, the thermal The problem of limit-cycle tones is most acute with
noise in analog-switch and amplifier FETs in a minimal first-order DSMs. (It diminishes rapidly with both loop
single-ended switched-capacitor subtracting integrator order and internal quantizer resolution [69], [85], [87]).
imposes a ceiling on the final OSADC SNR, in power To mitigate this, designers of first-order DSMs routinely
ratio terms, of [65], [73] add some form of ac dither signal at the analog x(n)
input. The dither tends to disrupt the long deterministic
V_upDCs (31) idling patterns in the DSM output and hence to prev_ent
SNR_<_-- narrowband error power from appearing in the base-
band.
16kT
Everard in 1979, in a mixed monolithic-discrete im-

d _ xtn) + +

(a)

-_ ONE-BIT
OUTPUT

(b)

x(n) + _ 1/2 _ Z.1 + _ -I- __. Z.1 -I- ONE-BIT

-'I 1
- I'- ...... I-
(c)

Fig. 14. Common delta-sigma modulator configurations of (a) first order (one integrator) and (b), (c) second order (two
integrators). All time delay in these diagrams is explicit in the unit-sample delay blocks, labeled z -_. The rightmost blocks
are called l-bit quantizers in communication theory and comparators in circuit design. Configurations (b) and (c) differ in
circuit timing and other practical details but yield similar OSADC SNR performance.

16 J. AudioEng.Soc.V, ol.39,No.1/2,1991January/February

PAPERS OVERSAMPLING A/D CONVERSION

plementation, added a squarewave input dither at the modulator of a given speed limit can provide higher
frequency of the final sampling (or "Nyquist") rate. output SNR, or higher output sampling rate at a given
This aliases to dc upon decimation and Everard removed SNR--both useful. Practical approaches to this goal
it with a dc autozero loop that was part of the converter in recent years have split between higher order pure-
[58]. Note that a squarewave added to the input of Fig. feedback noise shaping (the subject of this section) and
14(a) integrates to a triangle wave component at the multistage low-order noise shaping (treated in the fol-
comparator input, which in effect scans the 1-bit quan- lowing section).
tization threshold over a controlled range. This and
ease of generation are the rationales for squarewave The elementary noise-shaping loop of Sec. 3.6 yields
dither in first-order DSMs, and it appears to perform a high-pass output noise spectrum reflecting the order
well in practice. However, dither that aliases to dc of the low-pass loop filter H(z). This principle does
precludes digitizing dc inputs with the same OSADC. not extend straightforwardly to noise-shaping orders
Fox and Garrison, in an MOS RC-integrator (floating- beyond two, because of the ac instability problem in
high-order feedback loops, as has long been pointed
capacitor) version, employed a squarewave dither at
four times the final sampling rate [60]. The work that out [36], [63], [78], [79]. When the loop filter H(z)
Hurst, Brodersen, and the author did on MOS switched- in Figs. 7 and 8 contains three or more integrations,
capacitor implementations of first-order DSMs em- the phase shift in H(z) can be 180 degrees at the fre-
ployed a squarewave dither at twice the final sampling quency where the gain magnitude around the loop
rate [62], although extensive simulations showed that crosses unity (the "crossover frequency"), leading to
other such binary multiples also gave good results. In large-signal oscillations (just as in a feedback amplifier
the two foregoing studies, the dither fundamental and or other feedback system).
its harmonics were at frequencies where zeroes naturally
occur in the frequency response of the decimator, so Higher order feedback noise shaping can, however,
that dither components at the DSM output are removed work successfully with a more complex loop transfer
by the decimator automatically. Subsequently, Leung function. The essential idea is for the loop filter H(z)
et al. employed high-frequency squarewave dither (250 to exhibit a high-order low-pass response at low fre-
kHz, with an 8-kHz output rate). This fell in the stop- quencies, as its gain rolls off rapidly from a high dc
band of, and so was again removed by, the decimator value, but to drop back to a first- or second-order low-
[67]. pass response prior to the crossover frequency. The
first property provides the desired noise shaping while
Dithering for 1-bit OSADCs differs from that for the second imparts stability--formally, conditional
conventional (nonoversampling, staircase-curve) A/D stability. Such a feedback system can still break into
converters both in implementation and in objective, sustained oscillation if an overload occurs, even mo-
With OSADCs, the extra bandwidth outsidethe analog mentarily, in the loop, since to a fundamental-frequency
baseband affords additional options in the type of dither component in the loop, overload will effectively reduce
signal used and permits this signal to be removed easily the magnitude of loop gain, inducing crossover at lower
by the decimator. The primary purpose of.dither in 1- frequencies, where the phase shift is too large for sta-
bit OSADCs is to prevent limit-cycle tones, which, as bility. The problem is also more acute with a 1-bit than
with multibit conventional A/D converters, requires with a multibit quantizer in the loop. Adams et al. have
keeping the quantizer "busy." With a 1-bit OSADC, elaborated these issues lucidly [97].
however, the required dither signal may be large com-
pared to that for a conventional A/D converter. In the Because of the overload instability problem, higher
practical first-order DSMs described, the dither signals order feedback noise shapers routinely employ some
employed were typically -24 dB to -12 dB of the form of deliberate nonlinearity to prevent overload or
full-scale input amplitude, to suppress oscillations. NV Philips, a pioneer in the
use of higher order noise-shaping loops for audio, has
Naus and Dijkmans [69], [89], and Stikvoort [85], developed and analyzed a modified delta-sigma mod-
[87], have explored this subject in detail, including ulator topology incorporating a limiter block [85], [87],
perceptual effects. Notable among the several counter- [89], while Harris in 1982, in possibly the first corn-
intuitive features of OSADCs is that wideband analog mercial high-order 1-bit OSADC (for a different ap-
noise in a DSM's input circuitry, which is otherwise plication), employed diode-clamped state variables in
undesirable, will tend to dither an otherwise undithered the loop filter [80]. Refinements on the basic condi-
OSADC and therefore can actually improve its final tionally stable loop include moving the noise-spectrum
SNR. zeroes away from dc into the analog baseband (i.e.,
employingresonators,rather than integrators),which
4.3 Higher Order Feedback Noise Shaping can increase OSADC SNR by a few decibels with no
increase in loop order [82].
[77]-[97]
Secs. 3.4-3.6 and Figs. 9 and 10 demonstrate how Ganesan [92] has trenchantly observed that an
OSADC's resolution can rise faster through increases
increasingly high-order high-pass noise shaping in a in the oversampling factor than through increases in
modulator's output spectrum will yield increasing SNR the loop-filter order. The SNR improvement realized
payoffs (in bits per octave, for example) after deci- by a unity increment in the loop order rarely approaches
mation. Larger SNR payoff means in principle that a a full bit per octave, owing to additive dB penalties as

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 17

HAUSER PAPERS

in Eqs; (24) and (28), and to the increasing measures In Fig. 15 the second DSM forms a digital estimate
(such as headroom control) necessary to ensure stability _(n) of the error component introduced internally by
with. higher orders. Moreover, raising the loop order the 1-bit quantizer in the first DSM. This estimate must
costs somewhat in analog circuity (IC die area) as well then be digitally differentiated to compensate for the
as design time. One consistent benefit of higher order differentiation (spectral shaping) of the quantizer's error
feedback noise shaping, however, is its immunity from in the first DSM (analogous to Eq. (18) in the basic
the low-level limit-cycle tones characteristic of low- noise-shaping analysis). Simultaneously the output of
order modulators [69], [85], [87]. the first DSM is delayed to match the overall signal
delay (signal transfer function, Eq. (17)) through the
4.4 Multistage Noise Shaping ("MASH") second DSM. Combining the two outputs yields a
_[98]-[103] composite digital output y(n) whose quantization error
exhibits, in principle, second-order noise shaping,
An'alternative strategy for high-order noise shaping, similar to that in the outputs of the second-order feed-
without the stability issue of high-order feedback loops, back loops of Figs. 14(b) and (c). However, the fidelity
is a series of first- or second-order loops, each of which of the noise-shaping process in Fig. 15 rests on different
operates on an analog quantization-error residue from circuit components than in Figs. 14(b) and (c), and
the previous stage. The various digital outputs are then unlike pure-feedback noise shaping, the extension of
properly combined to form a composite oversampled the Fig. 15 topology to higher orders of noise shaping
sequence for the decimator· Fig. 15 shows a simple is straightforward [99]-[102].
example containing two first-order delta-sigma mod-
ulators (DSMs). Versions of this idea have circulated Inherent in Fig. 15 and related feedforward topologies
for many years. The current embodiment was introduced is a multibit digital output, from the linear combination
and popularized by Hayashi et al. [98] and subsequently of individual stage outputs, even when each is 1 bit
dubbed multistage noise shaping or MASH [99]. wide. This precludes the use with these topologies of
the efficient decimator structures that exploit 1-bit inputs
The arrangement oi: multiple DSMs in this manner (Sec. 4.2.4). It also implies that feedforward modulators
is sometimes called a "cascade" (after the cascade to- are subject to the slope-matching issue of Fig. 12(a),
pology of filters or amplifiers, for example), but a more in common with other multibit-output oversampling
descriptive label is feedforward, after the structure fa- modulators. They are, however, relatively robust against
miliar in amplifier design [ 103]. In feedforward mul- this problem provided the analog subtractions in Fig.
tistage amplifiers, an error residue (such as nonlinearity) 15 occur with high accuracy,l° for then the error residue
from one stage is sensed and amplified in a subsequent
stage, and the outputs of all such stages are ultimately l0 In the usual switched-capacitor realizations, this re-
combined. This technique, due to Black (1925), not quirement implies high operational-amplifier open-loop gain.
only engendered the now-generic term feedforward, Hayashi [98] has also stressed the importance of high op-
erational-amplifier gain.
but even predated the landmark invention and patent
(also by Black) of electrical negative feedback,

x<n'4: 2>--

·· , Il-BIT D/A I - Z_ r-
DELAY

-i- +, T _'__ _lin)T_D__IFFERE_N'TIATOR

,_ , .+ I!

I ANALOG . DIGITAL m
1

Fig. 15. A 'basic multistage-noise-shaping modulator, comprising two first-order delta-sigma modulators and feedforward
quantization-'residue c6rrection [98]. ,,

18 J.AudioEngS. oc.V, ol.39,No.1/2,1991January/February

PAPERS OVERSAMPLING A/D CONVERSION

passed from each stage to the next accurately reflects A complete decimator in an OSADC is characterized
the actual error remaining at each point. Another related by a baseband frequency response, an out-of-baseband
requirement is that the integrator in the first DSM of (AA) rejection response, and the effect of the decimator
Fig. 15 and the signal transfer function in the second on spectrally shaped quantization error. The first two
DSM--which are implemented in analog circuitry-- are standard digital-filter metrics, while the last may
must match, respectively, the gains of the differentiator be computed efficiently for each stage using g(n) and
and delay, which are digital, the expression for propagation of error autocorrelation
sequences (inverse Fourier transforms of the error
5 DECIMATORS FOR OSADCS
spectra) peculiar to this linear-time-varying (LTV)
The element responsible for suppressing both quan- system [70]:
tization error and unwanted high-frequency analog in-
puts in Figs. 2, 6, and 7 is the decimator. An OSADC 0_
decimatoris a real-timespecial-purposedigitalfilter, qbout(P) = _ qbin(pD - k)
with an input sampling rate normally in the megahertz.
This is a complex digital circuit routinely using several k = -0c
thousand transistors (comparable to a microprocessor),
The availability of dense, low-cost MOS-VLSI tech- (32)

nologies to implement such a filter was a prerequisite = + k) .
to the widespread use of oversampling in A/D conver- x _'_ g(m)g(m
sion (and in parallel, D/A conversion, which uses an
analogous filter to manipulate rates in the opposite di- m=-=

rection), One of the most remarkable departures that OSADCs
A stage of decimation is equivalent to a linear time- have occasioned from the traditional signal-acquisition

invariant digital filter [characterized therefore by some picture of Fig. 1 is the substantial merging of the op-
erations of antialiasing, sampling, and quantization.
impulse response g(n), of length L if finite] followed In Fig. 2, AA filtering begins in the remaining (sim-
by a skipping of D - 1 out of every D output samples, plified)analog filter,samplingoccurs partially (to the
in order to effect a D: 1 sampling-rate reduction [24]- initial high rate DFs) before quantization, and the
[26]. A complete decimator may contain more than quantization process is set up by the oversampling
one such stage. It is characteristic of finite-L (FIR) modulator. The decimator consummates all three op-
decimator stages that the costs (in operation rates and erations simultaneously as it limits digital bandwidth
and drops the sampling rate to its final value Fs.
memory) of their digital arithmetic scale according to
the ratio L/D, so that a filter whose order L is large by 60SADCS IN PERSPECTIVE
analog standards (say, 4096) may nevertheless be rel-
6.1 Comparison with "Conventional" A/D
atively simple if its decimation factor D is also large
[62], [70]. The ratioL/D is also the length of the impulse Converters
response (IR), g(n), measured in output samples; or-
dinarily the group delay through the stage is exactly Commerce and technical literature on "A/D conver-
half this number [11].
sion" have familiarized many users with practical A/
Many topologies for decimators are in use, informed D converters on the single-sample, staircase-curve
model. Especially from the viewpoint of applications,
by the analog modulator design, the target specifications questions are frequently asked about the relative role
of the OSADC, and the VLSI logic costs in imple- of OSADCs in comparison with these "conventional"
menting them. The original, and simplest, OSADC A/D converters.
decimator is an accumulator (which for 1-bit OSADCs
reduces to a binary counter). This sums up D successive Briefly, designers of N-bit linear conventional A/D
samples y(n) from the modulator, passes the sum to converters have evolved three broad implementations,
the output, and resets, g(n) in this case is rectangular, each with a characteristic speed or accuracy demand
with L -- D, which yields a limited low-pass frequency
Table 1. RepresentatdiveceimIaRtor.shapes g(n) for an FIR
response for modest antialiasing and error suppression.
More sophisticated decimators realize simple g(n) Type Minimum stopband Rolloff, L
rejection, dB dB/oct.- D
shapes, with possibly L > D, directly in their logic
[42], [58], [64], or entail a generalized decimating- Rectangular -21 -6 2
filter architecture and some provision to generate explicit Triangular -25 -12 4
4:1 piecewise quadratic
g(n) coefficients [62], [70]. Table 1 compares some -28 . -18 -4
practical g(n) forms for their stopband frequency re- (sin3c) -44 ' -6' 4
sponse and for the corresponding normalized ratio L/D Hamming -53
required [70]. For decimator designs that accommodate Hann (cos 2) -74 -18 4
flexible g(n) coefficients, g(n) can be numerically -80 -18 6
optimized for various criteria. The last two lines il- Blackman -80
lustrate such optimization for the AA objective, -6 5.0
TEqyupiriicpaplleK, ais_e+r5-0B%essdecl -80 Flat 1.7
tolerance '
Flat 3.1
Equiripple, 0.1-dB dc

tolerance

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February 19

HAUSER PAPERS

on the underlying circuitry. Counting or integrating applications are intolerant of this extra latency. More-
A/D converters require little analog circuitry, but up to over not all signal-acquisition systems actually require
2 N sequential voltage comparisons per analog sample, AA filtering, as for example when the source is known
which forces a wide ratio between circuitry clock rate to be band-limited.

and signal sampling rate for substantial (12+ bit) A/D 6.2 Delta-Sigma versus Delta Modulation
converter resolutions. Converters based on the nonres-
The delta-sigma modulation (DSM) of Inose and
toring division algorithm, or "successive approxima- coworkers [55], [56], which underlies the 1-bit over-
tion," in essence need only linear time, but entail corn- sampling topologies, emerged as a modification of delta
ponent matching or correction to the order of one part modulation (DM), a much older invention [ 1], [7], [9].
in 2N. Parallel (flash) A/D converters are fast but char- Both entail simple analog hardware and 1-bit quanti-
acteristically use 2N identical subcircuits. Innumerable zation. Either can serve as a starting point for an
refinements and combinations of these three basic ap- OSADC, and questions frequently arise about their
proaches exist [2]-[4]. relative roles in A/D conversion.

Against this context, oversampling A/D converters By definition, DSM produces a clocked 1-bit output
display the following distinctive traits. whose average value tracks the analog input, while
DM's average output tracks the derivative of the analog
1) Viewed only as quantizers, OSADCs exhibit the input. DM is the 1-bit form of differential pulse-code
basic merit of circumventing the pervasive 2N factors modulation (DPCM), in turn a subset of the predictive
in conventional A/D converters. The key principle of coding techniques, which seek bit-rate efficiency in
noise shaping permits OSADCs to gain resolution faster encoding analog signals by transmitting not the full
than they trade off speed, signals but corrections to simple models of them [9].
Since DM approximates the derivative of the analog
2) OSADCs are not in fact just quantizers. They input, its output must be digitally integrated, in addition
address the larger task of complete signal-acquisition to the decimation filtering generic to OSADCs. More-
interface and in particular the AA filtering problem, over, this digital integration must accurately match an
where conventional A/D converters perform quanti- analog integration within the delta modulator itself.
zation only. Some extent of built-in AA filtering is This introduces a circuit issue absent with DSM, and
automatic with OSADCs because of the presence of accounts in part for the limited practical success of
the decimating filter even if nominally designed only DM (and its other differential variants) as a front end
to suppress quantization noise. for monolithic signal acquisition. Another reason is
that DM in essence applies the same frequency response
3) The extreme decoupling between component ac- to the signal input that it applies to the quantization
curacy requirements and A/D converter resolution that error, so that there is no discriminatory noise shaping.
is possible in 1-bit OSADCs has made them attractive
for fabrication technologies not otherwise suited to high- The historical relation of DSM to DM, and the abun-
resolution A/D conversion [62], [65]. Since the great dant discourses about their structure (filters in the for-
majority of the integrated circuits manufactured cur- ward versus feedback path, and so forth) tend to obscure
rently are digital MOS chips in exactly such technol- the vital fact that the two methods are important for
ogles, this opens the prospect of on-chip analog interface completely different reasons. DM encodes a signal at
to a vastly increased field of digital chip designs, reduced bit rate; DSM disposes its quantization error
away from the signal baseband. Consequently the first
4) Harris [74] has recently demonstrated that 1-bit is useful primarily as a storage or transmission format
OSADCs can be less sensitive to random clock jitter for analog signals, the second as a means to OSADC
than their sample-by-sample counterparts, implementation.

Conventional A/D converters, however, display three 6.3 Origins of Oversampling A/D Conversion
distinctive capabilities not normally associated with OSADCs have not one history but several, owing to
OSADCs.
the development of their principles in diverse specialty
5) Minimal per-sample error. An A/D converter de- communities, working to different objectives and
scribed accurately by a staircase curve exhibits a max- sometimes even unaware of each other.
imum quantization error per sample comparable to the
average error per sample. While this feature is usually 1) The Cutler patent [36], filed 1954 April, was sero-
unnecessary in signal acquisition, it is beyond the ca- inal for the objective of resolution enhancement. Cutler
pability of most OSADCs, whose frequency-filtered systematically introduced the principle of oversampling
output quantization noise is characteristically incoherent with noise shaping and described generic first- and sec-
and predictable only on an average (i.e., power) basis. ond-order versions of the noise-shaping loop in Fig.
7. The objective then was not explicitly signal acqui-
6) Arbitrary sampling times. The sample-by-sample sition in the sense of the present paper, but rather source
A/D converter does not rely on the principle of a fre- coding (transmit the oversampled noise-shaped signal
quency domain or on periodic sampling times, without decimation, for eventual reconstruction at the
receiver). Replacing Curler's analog reconstruction filter
7) Minimal latency time. Any signal-acquisition
system that includes AA filtering imposes some filter
group delay on the signal path, and an OSADC also
does so even if its filter is intended only to suppress
quantization noise. Group delays through an OSADC
decimator may be several output-sample periods. Some

20 J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

PAPERS OVERSAMPLING ND CONVERSION

with a digital filter would yield the OSADC of Fig. 7 perspective of digital filtering, rather than source coding
or A/D converter implementation. This work evolved
(and would have been costly in the 1950s; Cutler's in isolation from the extensive development of OSADC
decimating filters per se, which perform similar func-
descriptions cite vacuum-tube hardware), tions. Considering the practical drawbacks described
in Sec. 6.2 for delta modulators as OSADC front ends,
2) Brahm's patent (filed 1961 September) for a the consistent use of DM as a starting point in the
"FIR-DM" variants suggests abstract rather than VLSI-
transducer-processing system included a second-order motivated logic design.

multibit noise-shaping A/D converter as in Fig. 7, with 7) A separate motivation for oversampling arose in
integrated-circuit design, explicitly to overcome the
specifics on the analog design of the loop filter H(z) limitations of conventional A/D converter approaches
with the analog components available on chip. Candy
and the options of using pulse-width modulation for and Wooley [43I, [44], [46] and van de Plassche [57]
the internal A/D or D/A blocks [37]. were early advocates of various forms of oversampling
for this purpose. Van de Plassche's first-order 1978
3) Inose, Yasuda, and Murakami in the early 1960s delta-sigma A/D converter in bipolar IC technology
arose as an alternative to counting-type conventional
elaborated the 1-bit form of Cutler's noise-shaping over- A/D converters (Sec. 6.1), and again used a simple
counter for a decimator. Later development established
sampling, calling this form delta-sigma modulation the now-common 1-bit noise-shaping loops in MOS
[55], [56]. (This work introduced the now-familiar switched-capacitor circuitry, also exploiting more fully
the principle of noise shaping [62], [65]-[68], [70]-
"sigma" tag, which was more or less arbitrary, although [72].
later readers unaware of the work of Inose et al. have
7 CONCLUDING REMARKS
inferred diverse meanings in it, some of them quite
OSADCs are a technology-driven solution to the
fanciful.) The objective was again source coding, rather overalltask of signal acquisition: antialiasing, sampling,
and quantization. OSADCs exploit the principles of
than A/D converter implementation, and Inose and co- oversampling for AA filtering, oversampling for res-
workers demonstrated first- and second-order delta- olution enhancement, noise shaping, and decimation
filtering, to perform signal acquisition efficiently with
sigma modulators sampling as fast as 40 megahertz the finite repertoires, tolerances, and costs of electrical
components in ICs. Realizing the potential of these
(for digital video). These papers remain among not principles in real hardware entails careful interplay
between signal theory and implementation technol-
only the earliest but also the best expositions on noise- ogy--the two cannot be separated.

shaping oversampling. They explored the AIWN anal- The basic low-order multibit noise-shaping loop of
Fig. 7, for resolution enhancement through oversam-
ysis of noise-shaping loops; the use of second-order pling, dates to Cutler's 1954 invention. Motivations
for the many current variations on this topology in IC
(or "double-integration") and arbitrary, including form include ease of implementation, tolerance of spe-
cific electrical imperfections, improved oversampling
higher-order, loop transfer functions; the presence of payoff in bits per octave, and proprietary control (since
limit-cycle tones in 1-bit oversampling; and the option the original inventions are now in the public domain).

of multiplexing several analog modulator sections for The diversity of vocabularies and implicit missions
evident in the overall literature relevant to OSADCs
multichannel coding. Most of these ideas have been reflects the interdisciplinary background of these de-
vices. In order to focus on principles, this paper has
rediscovered by, and popularly credited to, later authors, necessarily omitted many practical details and variations
4) Distinct from transmitting an oversampled digitized on the basic OSADC configurations, which, however,
are abundantly represented among the references.
signal directly is the idea of digitally low-pass filtering Similarly the technical cultures surveyed are a pragmatic
subset of those contributing to research on OSADCs.
it to yield Nyquist-rate linear A/D conversion or "PCM This research draws peripherally but fruitfully on other
specialties as well, including automatic control theory
encoding." Goodman used delta modulation (DM) as and computer-aided design (CAD).

the starting point, fortheexplicitobjectofA/Dconverter Oversampling digital-to-analog converters (OSDACs)
also embody the same principles, but entail different
implementation [38]. Subsequently Candy, starting with
a multibit A/D-D/A converter combination, oversam- 21

pled with noise shaping and digitally low-pass filtered

the result to interpolate between the A/D-D/A converter

quantization levels [39]. These early OSADCs marked
the appearance of what is now called the decimator,

Also, consistent with its general approach to A/D con-

version in terms of information mappings rather than

implementation, the communication-theory literature

has often portrayed the decimation step as a code con-

version that transforms one particular coding of an an-

alog waveform into another [9], [12], [38], [42].

5) Oversampling for AA filtering is one of the original
motivations for rate-changing digital filters in DSP re-

search [11].

6) Peled and Liu in 1973 advanced a simplified FIR

digital filter structure with "analog input," building on

Goodman's precedent [38] and leading to a genre of

related designs [ 104]- [ 109]. FIR filters with 1-bit inputs

(or coefficients) require no multibit digital multipli-

cations. Peled and Liu exploited this fact by preceding

an FIR filter with a delta modulator and following it
with an integrator. The resulting "FIR-DM" or "analog-

input" digital filters are therefore OSADCs, although

they do not use that terminology, and arise from a

J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February

HAUSER PAPERS

technology sensitivities owing to the exact interchange David F. Delchamps and Robert M. Gray furnished
of analog and digital sections, and the fact that the additional perspectives on the technical-cultures issue.
progress of sampling rates is opposite (from finite Eric Swanson, GaborC. Temes, and thereferees offered
towards infinite). Thus an OSDAC follows a topology
parallel to Fig. 2; the analog AA filter and sampler constructive suggestions on the manuscript, and Robert
become a digital (interpolating) low-pass filter (typically W. Adams encouraged its original preparation.

the major digital subsystem), the oversampling mod- 9 REFERENCES AND BIBLIOGRAPHY
ulation and noise shaping occur digitally, and the de-
cimator of Fig. 2 becomes an analog low-pass (recon- 9.1 General
struction) filter. [1] B. A. Blesser, "Digitization of Audio: A Com-

Terminological subtleties pervade this subject matter, prehensive Examination of Theory, Implementation,
Just as three senses of "interpolation" arise in noise- and Current Practice," J. Audio Eng. Soc., vol. 26,
shaping oversampling (Sec. 4.1), three main types of pp. 739-771 (1978 Oct.).
oscillation also occur there: the normal oscillation of
9.2 On Conventional A/D Converter Topologies
coarse quantization around a finer value (Sec. 3.5),
undesired limit-cycle tones (Sec. 4.2.7), and with higher and the Circuit-Designer Perspective
order feedback noise shaping, the possibility of AC [2] B. M. Gordon, "Linear Electronic Analog/Digital
loop instability (Sec. 4.3). The distinction can be dif-
ficult to express succinctly. Also, by definition "delta- Conversion Architectures, Their Origins, Parameters,
sigma" means specifically a 1-bit encoding with over- Limitations, and Applications," IEEE Trans. Circuits
sampling [55], [56], even though some recent titles in and Systems, vol. CAS-25, pp. 391-418 (1978 July);
the literature explicitly specify "l-bit" delta-sigma reprinted in Dooley, Ed., Data Conversion Integrated
and also "oversampling" delta-sigma converters. Other Circuits (IEEE Press, New York, 1980).
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[88] K. L. Kloker, B. L. Lindsley, and C.D. 25

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THE AUTHOR

Max W. Hauser was born in Berkeley, CA, in t 956. 1988-90, Mr. Hauser taught analog IC design at Cornell

He has designed solid-state circuits industrially since University, and he is currently working as a consulting
1971 and written about them since 1973. He holds engineer.
degrees in electrical engineering from the University
of California at Berkeley and the Massachusetts Institute In monolithic data conversion, he was an early pro-
of Technology. He has worked as an engineer at Tek- ponent of one-bit oversampling for the specific benefits
tronix, the Lincoln Laboratory, Hewlett-Packard Lab- of unconstrained resolution and digital technology
oratories, and the Signetics Corporation, on analog IC compatibility, demonstrating in 1984 fully integrated
design, digital signal processing, and spread-spectrum signal-acquisition systems in unmodified digital MOS
processes.
communications. One patent has been awarded and
others are pending from these industrial activities. In He is a member of the Audio Engineering Society
and the Institute of Electrical and Electronics Engineers.

26 J. Audio Eng. Soc., Vol. 39, No. 1/2, 1991 January/February


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