Neamen

564 C H A P T E R 1 2 The Bipolar Transistor

12.24 Three npn bipolar transistors have identical parameters except for the base doping
12.25 concentrations and neutral base widths. The base parameters for the three devices
are as follows:

Device Base doping Base width

A NB ϭ NB0 xB ϭ xB0

B NB ϭ 2NB0 xB ϭ xB0

C NB ϭ NB0 xB ϭ xB0͞2

(The base doping concentration for the B device is twice that of A and C, and the
neutral base width for the C device is half that of A and B.)

(a) Determine the ratio of the emitter injection efficiency of (i) device B to device
A and (ii) device C to device A.

(b) Repeat part (a) for the base transport factor.
(c) Repeat part (a) for the recombination factor.
(d) Which device has the largest common-emitter current gain ␤?

Repeat Problem 12.24 for three devices in which the emitter parameters vary. The
emitter parameters for the three devices are as follows:

Device Emitter doping Emitter width

A NE ϭ NE0 xE ϭ xE0
B NE ϭ 2NE0 xE ϭ xE0
C NE ϭ NE0 xE ϭ xE0͞2

12.26 An npn silicon transistor is biased in the inverse-active mode with VBE ϭ Ϫ3 V and
12.27 VBC ϭ 0.6 V. The doping concentrations are NE ϭ 1018 cmϪ3, NB ϭ 1017 cmϪ3, and
12.28 NC ϭ 1016 cmϪ3. Other parameters are xB ϭ 1 ␮m, ␶E0 ϭ ␶B0 ϭ ␶C0 ϭ 2 ϫ 10Ϫ7 s,
DE ϭ 10 cm2/s, DB ϭ 20 cm2/s, DC ϭ 15 cm2/s, and A ϭ 10Ϫ3 cm2. (a) Calculate
and plot the minority carrier distribution in the device. (b) Calculate the collec-
tor and emitter currents. (Neglect geometry factors and assume the recombination
factor is unity.)

(a) Calculate the base transport factor, ␣T, for xB͞LB ϭ 0.01, 0.10, 1.0, and 10.
Assuming that ␥ and ␦ are unity, determine ␤ for each case. (b) Calculate the emit-
ter injection efficiency, ␥, for NB͞NE ϭ 0.01, 0.10, 1.0, and 10. Assuming that ␣T
and ␦ are unity, determine ␣ for each case. (c) Considering the results of parts (a)
and (b), what conclusions can be made concerning when the base transport factor
or when the emitter injection efficiency are the limiting factors for the common-
emitter current gain?

(a) Calculate the recombination factor for VBE ϭ 0.2, 0.4, and 0.6 V. Assume the
following parameters:

DB ϭ 25 cm2/s DE ϭ 10 cm2/s
NE ϭ 5 ϫ 1018 cmϪ3 NB ϭ 1 ϫ 1017 cmϪ3
NC ϭ 5 ϫ 1015 cmϪ3 xB ϭ 0.7 ␮m
␶B0 ϭ ␶E0 ϭ 10Ϫ7 s Jr0 ϭ 2 ϫ 10Ϫ9 A/cm2
ni ϭ 1.5 ϫ 1010 cmϪ3

(b) Assuming the base transport and emitter injection efficiency factors are
unity, calculate the common-emitter current gain for the conditions in part (a).

Problems 565

12.29 (c) Considering the results of part (b), what can be said about the recombination
*12.30 factor being the limiting factor in the common-emitter current gain.
12.31
12.32 Consider a uniformly dope silicon npn bipolar transistor at T ϭ 300 K with the
12.33 following parameters: DB ϭ 23 cm2/s, DE ϭ 8 cm2/s, ␶B0 ϭ 2 ϫ 10Ϫ7 s, ␶E0 ϭ 8 ϫ
10Ϫ8 s, NB ϭ 2 ϫ 1016 cmϪ3, and xE ϭ 0.35 ␮m. The recombination factor has been
determined to be ␦ ϭ 0.9975. The required common-emitter current gain is ␤ ϭ 150.
A minimum neutral base width of xB ϭ 0.80 ␮m can be fabricated. (a) Determine an
appropriate neutral base width and the minimum emitter doping concentration, NE,
to meet this specification. (b) Using the results of part (a), what are the values of ␣T
and ␥?

(a) The recombination current density, Jr0, in an npn silicon bipolar transistor at
T ϭ 300 K is Jr0 ϭ 5 ϫ 10Ϫ8 A/cm2. The uniform dopings are NE ϭ 1018 cmϪ3,
NB ϭ 5 ϫ 1016 cmϪ3, and NC ϭ 1015 cmϪ3. Other parameters are DE ϭ 10 cm2/s,
DB ϭ 25 cm2/s, ␶E0 ϭ 10Ϫ8 s, and ␶B0 ϭ 10Ϫ7 s. Determine the neutral base width so
that the recombination factor is ␦ ϭ 0.995 when VBE ϭ 0.55 V (b) If Jr0 remains
constant with temperature, what is the value of ␦ when VBE ϭ 0.55 V for the case
when the temperature is T ϭ 400 K? Use the value of xB determined in part (a).

(a) Plot, for a bipolar transistor, the base transport factor, ␣T, as a function of
(xB͞LB) over the range 0.01 Յ (xB͞LB) Յ 10. (Use a log scale on the horizontal
axis.) (b) Assuming that the emitter injection efficiency and recombination factors
are unity, plot the common-emitter gain for the conditions in part (a). (c) Consider-
ing the results of part (b), what can be said about the base transport factor being the
limiting factor in the common-emitter current gain?

(a) Plot the emitter injection efficiency as a function of the doping ratio, NB͞NE,
over the range 0.01 Յ NB͞NE Յ 10. Assume that DE ϭ DB, LB ϭ LE, and xB ϭ xE.
(Use a log scale on the horizontal axis.) Neglect bandgap narrowing effects.
(b) Assuming that the base transport factor and recombination factors are unity, plot
the common-emitter current gain for the conditions in part (a). (c) Considering the
results of part (b), what can be said about the emitter injection efficiency being the
limiting factor in the common-emitter current gain.

(a) Plot the recombination factor as a function of the forward-bias B–E voltage for
0.1 Յ VBE Յ 0.6. Assume the following parameters:

DB ϭ 25 cm2/s DE ϭ 10 cm2/s
NE ϭ 5 ϫ 1018 cmϪ3 NB ϭ 1 ϫ 1017 cmϪ3
NC ϭ 5 ϫ 1015 cmϪ3 xB ϭ 0.7 ␮m
␶B0 ϭ ␶E0 ϭ 10Ϫ7 s Jr0 ϭ 2 ϫ 10Ϫ9 A/cm2
ni ϭ 1.5 ϫ 1010 cmϪ3

12.34 (b) Assuming the base transport and emitter injection efficiency factors are unity,
plot the common-emitter current gain for the conditions in part (a). (c) Considering
the results of part (b), what can be said about the recombination factor being the
limiting factor in the common-emitter current gain.

The emitter in a BJT is often made very thin to achieve high operating speed. In
this problem, we investigate the effect of emitter width on current gain. Consider
the emitter injection efficiency given by Equation (12.35a). Assume that NE ϭ 100
NB, DE ϭDB, and LE ϭ LB. Also let xB ϭ 0.1 LB. Plot the emitter injection efficiency
for 0.01LE Յ xE Յ 10LE. From these results, discuss the effect of emitter width on
the current gain.

566 C H A P T E R 1 2 The Bipolar Transistor

Section 12.4 Nonideal Effects

12.35 An npn bipolar transistor is biased in the forward-active mode. (a) The collector
12.36 current is IC ϭ 1.2 mA when biased at VCE ϭ 2 V. The Early voltage is VA ϭ 120 V.
12.37 Determine (i) the output resistance ro, (ii) the output conductance go, and (iii) the
*12.38 collector current when biased at VCE ϭ 4 V. (b) Repeat part (a) if the collector cur-
rent is IC ϭ 0.25 mA when biased at VCE ϭ 2 V and the Early voltage is VA ϭ 160 V.
12.39
The output resistance of a pnp bipolar transistor is ro ϭ 180 k⍀. The Early voltage is
12.40 VA ϭ 80 V. Determine the change in collector current if VEC increases from 2 to 5 V.
12.41
12.42 A uniformly doped silicon npn bipolar transistor at T ϭ 300 K has parameters
NE ϭ 2 ϫ 1018 cmϪ3, NB ϭ 2 ϫ 1016 cmϪ3, NC ϭ 2 ϫ 1015 cmϪ3, xBO ϭ 0.85 ␮m,
and DB ϭ 25 cm2/s. Assume xBO LB and let VBE ϭ 0.650 V. (a) Determine the
electron diffusion current density in the base for (i) VCB ϭ 4 V, (ii) VCB ϭ 8 V, and
(iii) VCB ϭ 12 V. (b) Estimate the Early voltage.

The base width of a bipolar transistor is normally small to provide a large current
gain and increased speed. The base width also affects the Early voltage. In a silicon
npn bipolar transistor at T ϭ 300 K, the doping concentrations are NE ϭ 1018 cmϪ3,
NB ϭ 3 ϫ 1016 cmϪ3, and NC ϭ 5 ϫ 1015 cmϪ3. Assume DB ϭ 20 cm2/s and
␶B0 ϭ 5 ϫ 10Ϫ7 s, and let VBE ϭ 0.70 V. Using voltages VCB ϭ 5 V and VCB ϭ 10 V
as two data points, estimate the Early voltage for metallurgical base widths of
(a) 1.0 ␮m, (b) 0.80 ␮m, and (c) 0.60 ␮m.

A uniformly doped pnp silicon bipolar transistor has a base doping of
NB ϭ 1016 cmϪ3, a collector doping of NC ϭ 1015 cmϪ3, a metallurgical base width
of xB0 ϭ 0.70 ␮m, a base minority carrier diffusion coefficient of DB ϭ 10 cm2/s,
and a B–E cross-sectional area of ABE ϭ 10Ϫ4 cm2. The transistor is biased in
the forward-active mode with VEB ϭ 0.625 V. Neglecting the B–E space charge
width and assuming xB LB, (a) determine the change in neutral base width as
VBC changes from 1 to 5 V, (b) find the corresponding change in collector current,
(c) estimate the Early voltage, and (d) find the output resistance.

Consider a uniformly doped silicon npn bipolar transistor in which xE ϭ xB,
LE ϭ LB, and DE ϭ DB. Assume that ␣T ϭ ␦ ϭ 0.995 and let NB ϭ 1017 cmϪ3, Cal-
culate and plot the common-emitter current gain ␤ for NE ϭ 1017, 1018, 1019, and
1020 cmϪ3, and for the case (a) when the bandgap narrowing effect is neglected, and
(b) when the bandgap narrowing effect is taken into account.

A silicon pnp bipolar transistor at T ϭ 300 K is to be designed so that the emitter
injection efficiency is ␥ ϭ 0.996. Assume that xE ϭ xB, LE ϭ LB, DE ϭ DB, and
let NE ϭ 1019 cmϪ3. (a) Determine the maximum base doping, taking into account
bandgap narrowing. (b) If bandgap narrowing were neglected, what would be the
maximum base doping required?

The current crowding effect, to a first approximation, can be determined by using
the geometry shown in Figure P12.42. Assume that one-half of the base current
enters from each side of the emitter strip and flows uniformly to the center of the
emitter. The base is p type with the following parameters: NB ϭ 2 ϫ 1016 cmϪ3,
xB ϭ 0.65 ␮m, ␮p ϭ 250 cm2/V-s, and L ϭ 25 ␮m. (a) Assume S ϭ 10 ␮m.
(i) Calculate the resistance between x ϭ 0 and x ϭ S͞2. (ii) If IB͞2 ϭ 5 ␮A,
determine the voltage drop between x ϭ 0 and x ϭ S͞2. (iii) For VBE ϭ 0.60 V at
x ϭ S͞2, determine the ratio of electrons being injected into the base at x ϭ S͞2
compared to x ϭ 0. (b) Repeat part (a) for S ϭ 3 ␮m.

Problems 567

L
S

IB/2 Emitter IB/2
Base
Collector

x ϭ 0 xB x ϭ S/2

Figure P12.42 | Figure for Problems 12.42
and 12.43.

12.43 Consider the geometry shown in Figure P12.42 and the device parameters given in
*12.44
Problem 12.42 except for the emitter width S. Determine the maximum value of S

such that the ratio of electrons being injected into the base at x ϭ S͞2 compared to

x ϭ 0 is no less than 0.90.

The base doping in a diffused nϩpn bipolar transistor can be approximated by an

exponential as

_Ϫax
xB
͑ ͒NB ϭ NB(0) exp

where a is a constant and is given by

_NB(_0)
NB (xB)
͑ ͒a ϭ ln

12.45 (a) Show that, in thermal equilibrium, the electric field in the neutral base region
is a constant. (b) Indicate the direction of the electric field. Does this electric field
aid or retard the flow of minority carrier electrons across the base? (c) Derive an
expression for the steady-state minority carrier electron concentration in the base
under forward bias. Assume no recombination occurs in the base. (Express the elec-
tron concentration in terms of the electron current density.)

Consider a uniformly doped pnp silicon bipolar transistor with doping concen-
trations of NE ϭ 1018 cmϪ3, NB ϭ 5 ϫ 1016 cmϪ3, and NC ϭ 2 ϫ 1015 cmϪ3. The
common-base current gain is ␣ ϭ 0.9930. Determine (a) BVBC0, (b) BVEC0, and
(c) the emitter–base breakdown voltage. (Assume N ϭ 3 for the empirical constant.)

12.46 A high-voltage silicon npn bipolar transistor is to be designed such that the uniform
12.47 base doping is NB ϭ 1016 cmϪ3 and the common-emitter current grain is ␤ ϭ 50.
12.48 The breakdown voltage BVCEO is to be at least 60 V. Determine the maximum
collector doping and the minimum collector length to support this voltage. (Assume
n ϭ 3.)

A silicon npn bipolar transistor is uniformly doped with NB ϭ 5 ϫ 1016 cmϪ3 and
NC ϭ 8 ϫ 1015 cmϪ3. The metallurgical base width is xB0 ϭ 0.50 ␮m with VBE ϭ 0
and VCB ϭ 0. (a) Determine the expected avalanche B–C breakdown voltage.
(b) Calculate the value of VCB at which punch-through occurs.

Consider an npn silicon bipolar transistor with doping concentrations of
NB ϭ 2 ϫ 1016 cmϪ3 and NC ϭ 5 ϫ 1015 cmϪ3, and with a metallurgical base width
of xB0 ϭ 0.65 ␮m. Let VBE ϭ 0.625 V. (a) Determine VCE at punch-through. (b) Cal-
culate the magnitude of the maximum electric field in the B–C space charge region
at punch-through.

568 C H A P T E R 1 2 The Bipolar Transistor

12.49 A uniformly doped silicon pnp bipolar transistor has doping concentrations of
NE ϭ 1018 cmϪ3, NB ϭ 5 ϫ 1016 cmϪ3, and NC ϭ 3 ϫ 1015 cmϪ3. Determine the mini-
mum metallurgical base width such that the punch-through voltage is Vpt ϭ 15 V.

Section 12.5 Equivalent Circuit Models

12.50 The VCE(sat) voltage of an npn transistor in saturation continues to decrease
slowly as the base current increases. In the Ebers–Moll model, assume ␣F ϭ 0.99,
12.51 ␣R ϭ 0.20, and IC ϭ 1 mA. For T ϭ 300 K, determine the base current, IB, neces-
12.52 sary to give (a) VCE(sat) ϭ 0.30 V, (b) VCE(sat) ϭ 0.20 V, and (c) VCE(sat) ϭ 0.10 V.

12.53 Consider an npn bipolar transistor biased in the active mode. Using the Ebers–Moll
12.54 model, derive the equation for the base current, IB, in terms of ␣F, ␣R, IES, ICS, and VBE.

Consider the Ebers–Moll model and let the base terminal be open so IB ϭ 0. Show
that, when a collector–emitter voltage is applied, we have

IC ϵ ICEO ϭ ICS _(1 Ϫ ␣_F ␣R)
(1 Ϫ ␣F)

The parameters in the Ebers-Moll model are ␣F ϭ 0.9920, IES ϭ 5 ϫ 10Ϫ14 A, and
ICS ϭ 10Ϫ13 A. Let T ϭ 300 K. Plot IC versus VCB for Ϫ0.5 Ͻ VCB Ͻ 2 V and for
(a) VBE ϭ 0.2 V, (b) VBE ϭ 0.4 V, and (c) VBE ϭ 0.6 V. (Note that VCB ϭ ϪVBC.)

The collector–emitter saturation voltage, from the Ebers–Moll model, is given by
Equation (12.77). Consider a power BJT in which ␣F ϭ 0.975, ␣R ϭ 0.150, and
IC ϭ 5 A. Plot VCE (sat) versus IB over the range 0.15 Յ IB Յ 1 A.

Section 12.6 Frequency Limitations

12.55 Consider a uniformly doped silicon bipolar transistor at T ϭ 300 K with the follow-
ing parameters:

IE ϭ 0.25 mA Cje ϭ 0.35 pF
xB ϭ 0.65 ␮m Dn ϭ 25 cm2/s
xdc ϭ 2.2 ␮m rc ϭ 18 ⍀
Cs ϭ C␮ ϭ 0.020 pF ␤ ϭ 125

12.56 (a) Determine the transit time factors (i) ␶e, (ii) ␶b, (iii) ␶d, and (iv) ␶c.
12.57
(b) Find the total transit time ␶ec. (c) Calculate the cutoff frequency fT.

(c) Find the beta cutoff frequency f␤.

In a particular bipolar transistor, the base transit time is 20 percent of the total delay
time. The base width is 0.5 ␮m and the base diffusion coefficient is DB ϭ 20 cm2/s.
Determine the cutoff frequency.

Assume the base transit time of a BJT is 100 ps and carriers cross the 1.2 ␮m B–C
space charge region at a speed of 107 cm/s. The emitter–base junction charging
time is 25 ps and the collector capacitance and resistance are 0.10 pF and 10 ⍀,
respectively. Determine the cutoff frequency.

Summary and Review

*12.58 (a) A silicon npn bipolar transistor at T ϭ 300 K is to be designed such that the
common-emitter current gain is at least ␤ ϭ 120 and the Early voltage is at least
VA ϭ 140 V. (b) Repeat part (a) for a pnp silicon bipolar transistor.

Reading List 569

*12.59 Design a uniformly doped silicon npn bipolar transistor so that ␤ ϭ 100 at T ϭ
*12.60 300 K. The maximum CE voltage is to be 15 V and any breakdown voltage is to be
at least three times this value. Assume the recombination factor is constant at ␦ ϭ
0.995. The transistor is to be operated in low injection with a maximum collector
current of IC ϭ 5 mA. Bandgap narrowing effects and base width modulation ef-
fects are to be minimized. Let DE ϭ 6 cm2/s, DBϭ25 cm2/s, ␶E0 ϭ 10Ϫ8 s, and ␶B0 ϭ
10Ϫ7 s. Determine doping concentrations, the metallurgical base width, the active
area, and the maximum allowable VBE.

Design a pair of complementary npn and pnp bipolar transistors. The transistors
are to have the same metallurgical base and emitter widths of WB ϭ 0.75 ␮m and
xE ϭ 0.5 ␮m. Assume that the following minority carrier parameters apply to each
device.

Dn ϭ 23 cm2/s ␶n0 ϭ 10Ϫ7 s
Dp ϭ 8 cm2/s ␶p0 ϭ 5 ϫ 10Ϫ8 s

The collector doping concentration in each device is 5 ϫ 1015 cmϪ3 and the recom-
bination factor in each device is constant at ␦ ϭ 0.9950. (a) Design, if possible, the
devices so that ␤ ϭ 100 in each device. If this is not possible, how close a match
can be obtained? (b) With equal forward-bias base–emitter voltages applied, the
collector currents are to be IC ϭ 5 mA with each device operating in low injection.
Determine the active cross-sectional areas.

READING LIST

1. Dimitrijev, S. Principles of Semiconductor Devices. New York: Oxford University,
2006.

2. Hu, C. C. Modern Semiconductor Devices for Integrated Circuits. Upper Saddle
River, NJ: Pearson Prentice Hall, 2010.

3. Kano, K. Semiconductor Devices. Upper Saddle River, NJ: Prentice Hall, 1998.
4. Muller, R. S., and T. I. Kamins. Device Electronics for Integrated Circuits. 2nd ed.

New York: John Wiley & Sons, 1986.
5. Navon, D. H. Semiconductor Microdevices and Materials. New York: Holt, Rinehart,

& Winston, 1986.
6. Neudeck, G. W. The Bipolar Junction Transistor. Vol. 3 of the Modular Series on

Solid State Devices. 2nd ed. Reading, MA: Addison-Wesley, 1989.
7. Ng, K. K. Complete Guide to Semiconductor Devices. New York: McGraw-Hill, 1995.
8. Ning, T. H., and R. D. lsaac. “Effect of Emitter Contact on Current Gain of Silicon

Bipolar Devices.” Polysilicon Emitter Bipolar Transistors. eds. A. K. Kapoor and
D. J. Roulston. New York: IEEE Press, 1989.
9. Pierret, R. F. Semiconductor Device Fundamentals. Reading, MA: Addison-Wesley,
1996.
10. Roulston, D. J. Bipolar Semiconductor Devices. New York: McGraw-Hill, 1990.
11. ____________. An Introduction to the Physics of Semiconductor Devices. New York:
Oxford University Press, 1999.
*12. Shur, M. GaAs Devices and Circuits. New York: Plenum Press, 1987.
13. _______. Introduction to Electronic Devices. New York: John Wiley & Sons, Inc.,1996.
*14. _______. Physics of Semiconductor Devices. Englewood Cliffs, NJ: Prentice Hall, 1990.

570 C H A P T E R 1 2 The Bipolar Transistor

15. Singh, J. Semiconductor Devices: An Introduction. New York: McGraw-Hill, 1994.

16. _______. Semiconductor Devices: Basic Principles. New York: John Wiley & Sons,
Inc., 2001.

17. Streetman, B. G., and S. K. Banerjee. Solid State Electronic Devices, 6th ed. Upper
Saddle River, NJ: Pearson Prentice Hall, 2006.

18. Sze, S. M. High-Speed Semiconductor Devices. New York: John Wiley & Sons, 1990.

19. ________. and K. K. Ng. Physics of Semiconductor Devices, 3rd ed. Hoboken, NJ:
John Wiley & Sons, Inc., 2007.

20. Tiwari, S., S. L. Wright, and A. W. Kleinsasser. “Transport and Related Properties of
(Ga, Al)As/GaAs Double Heterojunction Bipolar Junction Transistors.” IEEE Trans-
actions on Electron Devices, ED-34 (February 1987), pp. 185–187.

*21. Taur, Y. and T. H. Ning. Fundamentals of Modern VLSI Devices, 2nd ed. Cambridge
University Press, 2009.

*22. Wang, S. Fundamentals of Semiconductor Theory and Device Physics. Englewood
Cliffs, NJ: Prentice Hall, 1989.

*23. Warner, R. M. Jr., and B. L. Grung. Transistors: Fundamentals for the Integrated-
Circuit Engineer. New York: John Wiley & Sons, 1983.

24. Yang, E. S. Microelectronic Devices. New York: McGraw-Hill, 1988.

*25. Yuan, J. S. SiGe, GaAs, and InP Heterojunction Bipolar Transistors. New York:
John Wiley & Sons, Inc., 1999.

*Indicates references that are at an advanced level compared to this text.

13C H A P T E R

The Junction Field-Effect
Transistor

⌻ he Junction Field-Effect Transistor (JFET) is a separate class of field-effect
transistors. The MOSFET has been considered in Chapters 10 and 11. In this
chapter, we cover the physics and properties of the JFET. Although we have
discussed the MOS and bipolar transistors in previous chapters, the material in this
chapter only presumes a knowledge of semiconductor material properties and the
characteristics of pn and Schottky barrier junctions.

As with the transistors considered in previous chapters, the JFET, in conjunction
with other circuit elements, is capable of voltage gain and signal power gain. Again,
the basic transistor action is the control of current at one terminal by the voltage
across the other two terminals of the device.

There are two general categories of JFETs. The first is the pn junction FET, or
pn JFET, and the second is the MEtal-Semiconductor Field-Effect Transistor, or
MESFET. The pn JFET is fabricated with a pn junction and the MESFET is fabri-
cated with a Schottky barrier rectifying junction. ■

13.0 | PREVIEW

In this chapter, we will:
■ Present the geometry and discuss the basic operation of the pn JFET and

MESFET devices.
■ Analyze the modulation of the channel conductance of the JFET by an electric

field perpendicular to the channel. The modulating electric field is induced
in the space charge region of a reverse-biased pn junction or reverse-biased
Schottky barrier junction.
■ Derive the ideal current–voltage characteristics of the JFET in terms of the
semiconductor material and geometrical properties of the device.

571

572 C H A P T E R 1 3 The Junction Field-Effect Transistor

■ Consider the transistor gain, or transconductance, of the JFET.
■ Discuss a few nonideal effects in JFETs, including channel-length modulation

and velocity saturation effects.

■ Develop a small-signal equivalent circuit of the JFET that is used to relate
small-signal currents and voltages in the device.

■ Examine various physical factors affecting the frequency response and limita-
tions of JFETs, and derive an expression for the cutoff frequency.

■ Present the geometry and characteristics of a specialized JFET called HEMT.

13.1 | JFET CONCEPTS

The concept of the field-effect phenomenon was the basis for the first proposed solid-
state transistor. Patents filed in the 1920s and 1930s conceived and investigated the
transistor shown in Figure 13.1. A voltage applied to the metal plate modulated the
conductance of the semiconductor under the metal and controlled the current be-
tween the ohmic contacts. Good semiconductor materials and processing technology
were not available at that time, so the device was not seriously considered again until
the 1950s.

The phenomenon of modulating the conductance of a semiconductor by an elec-
tric field applied perpendicular to the surface of a semiconductor is called field effect.
This type of transistor has also been called the unipolar transistor, to emphasize that
only one type of carrier, the majority carrier, is involved in the operation. We will
qualitatively discuss the basic operation of the two types of JFETs in this section, and
introduce some of the JFET terminology.

13.1.1 Basic pn JFET Operation

The first type of field-effect transistor is the pn junction field-effect transistor, or pn
JFET. A simplified cross section of a symmetrical device is shown in Figure 13.2.
The n region between the two p regions is known as the channel and, in this n-channel

Gate

C pϩ
n
Source eeeϪϪϪ Drain
pϩ
Aluminum B ID
A Aluminum ؉ ؉
Metal VGS
Semiconductor (Cu2S) contact VDS
؊ ؊
Figure 13.1 | Idealization of the
Lilienfeld transistor. Figure 13.2 | Cross section of a
(From Pierret [10].) symmetrical n-channel pn junction FET.

1 3 . 1 JFET Concepts 573

device, majority carrier electrons flow between the source and drain terminals. The
source is the terminal from which carriers enter the channel from the external circuit,
the drain is the terminal where carriers leave, or are drained from, the device, and the
gate is the control terminal. The two gate terminals shown in Figure 13.2 are tied to-
gether to form a single gate connection. Since majority carrier electrons are primarily
involved in the conduction in this n-channel transistor, the JFET is a majority-carrier
device.

A complementary p-channel JFET can also be fabricated in which the p and
n regions are reversed from those of the n-channel device. Holes will flow in the
p-type channel between source and drain and the source terminal will now be the
source of the holes. The current direction and voltage polarities in the p-channel
JFET are the reverse of those in the n-channel device. The p-channel JFET is
generally a lower frequency device than the n-channel JFET due to the lower hole
mobility.

Figure 13.3a shows an n-channel pn JFET with zero volts applied to the gate.
If the source is at ground potential, and if a small positive drain voltage is applied, a
drain current ID is produced between the source and drain terminals. The n channel
is essentially a resistance so the ID versus VDS characteristic, for small VDS values, is
approximately linear, as shown in the figure.

When we apply a voltage to the gate of a pn JFET with respect to the source
and drain, we alter the channel conductance. If a negative voltage is applied to the
gate of the n-channel pn JFET shown in Figure 13.3, the gate-to-channel pn junction
becomes reverse biased. The space charge region now widens so the channel region
becomes narrower and the resistance of the n channel increases. The slope of the
ID versus VDS curve, for small VDS, decreases. These effects are shown in Figure 13.3b.
If a larger negative gate voltage is applied, the condition shown in Figure 13.3c can
be achieved. The reverse-biased gate-to-channel space charge region has completely
filled the channel region. This condition is known as pinchoff. The drain current at
pinchoff is essentially zero, since the depletion region isolates the source and drain
terminals. Figure 13.3c shows the ID versus VDS curve for this case, as well as the
other two cases.

The current in the channel is controlled by the gate voltage. The control of the
current in one part of the device by a voltage in another part of the device is the
basic transistor action. This device is a normally on or depletion mode device, which
means that a voltage must be applied to the gate terminal to turn the device off.

Now consider the situation in which the gate voltage is held at zero volts, VGS ϭ 0,
and the drain voltage changes. Figure 13.4a is a replica of Figure 13.3a for zero gate
voltage and a small drain voltage. As the drain voltage increases (positive), the gate-
to-channel pn junction becomes reverse biased near the drain terminal so that the
space charge region extends further into the channel. The channel is essentially a
resistor, and the effective channel resistance increases as the space charge region
widens; therefore, the slope of the ID versus VDS characteristic decreases as shown in
Figure 13.4b. The effective channel resistance now varies along the channel length
and, since the channel current must be constant, the voltage drop through the channel
becomes dependent on position.

574 C H A P T E R 1 3 The Junction Field-Effect Transistor

VGS ϭ 0

VGS ϭ 0

pϩ ID ID

S ϩVDS

pϩ

VDS

VGS ϭ 0

(a)

VGS ϭ ϪV1

VGS ϭ 0

pϩ ID VGS ϭ ϪV1
ID

S ϩVDS

pϩ

VDS

VGS ϭ ϪV1

(b)

VGS ϭ ϪV2 VGS ϭ 0

pϩ ID VGS ϭ ϪV1
ID

S ϩVDS

pϩ VGS ϭ ϪV2

VDS

VGS ϭ ϪV2

(c)

Figure 13.3 | Gate-to-channel space charge regions and I–V characteristics for small VDS
values and for (a) zero gate voltage, (b) small reverse-biased gate voltage, and (c) a gate
voltage to achieve pinchoff.

If the drain voltage increases further, the condition shown in Figure 13.4c can
result. The channel has been pinched off at the drain terminal. Any further increase
in drain voltage will not cause an increase in drain current. The I–V characteristic for
this condition is also shown in this figure. The drain voltage at pinchoff is referred to
as VDS(sat). For VDS Ͼ VDS(sat), the transistor is said to be in the saturation region and
the drain current, for this ideal case, is independent of VDS. At first glance, we might
expect the drain current to go to zero when the channel becomes pinched off at the
drain terminal, but we will show why this does not happen.

1 3 . 1 JFET Concepts 575

VGS ϭ 0 ID ID
(ϩ)VDS
pϩ
Sn VDS

pϩ (a)

VGS ϭ 0

VGS ϭ 0

pϩ ID ID Changing
Sn (ϩϩ)VDS channel
resistance
pϩ
VDS
VGS ϭ 0
(b)
VGS ϭ 0

pϩ ID ID Saturation
Sn (ϩϩϩ)VDS region

pϩ VDS

VGS ϭ 0

(c)

Figure 13.4 | Gate-to-channel space charge regions and I–V characteristics for zero
gate voltage and for (a) a small drain voltage, (b) a larger drain voltage, and (c) a drain
voltage to achieve pinchoff at the drain terminal.

Figure 13.5 shows an expanded view of the pinchoff region in the channel. The
n channel and drain terminal are now separated by a space charge region which has
a length ⌬ L. The electrons move through the n channel from the source and are
injected into the space charge region where, subjected to the E-field force, they are
swept through into the drain contact area. If we assume that ⌬ L L, then the elec-
tric field in the n-channel region remains unchanged from the VDS(sat) case; the drain
current will remain constant as VDS changes. Once the carriers are in the drain region,