466 C H A P T E R 1 1 Metal–Oxide–Semiconductor Field-Effect Transistor: Additional Concepts
G G
VDS
nϩ nϩ D
p S
(a) (b)
Figure 11.23 | (a) Cross section of the n-channel MOSFET. (b) Equivalent circuit
including the parasitic bipolar transistor.
n-type source and drain contacts along with the p-type substrate. The source and
body are at ground potential. The n(source)-p(substrate)-n(drain) structure also
forms a parasitic bipolar transistor. The equivalent circuit is shown in Figure 11.23b.
Figure 11.24a shows the device when avalanche breakdown is just beginning
in the space charge region near the drain. We tend to think of the avalanche break-
down suddenly occurring at a particular voltage. However, avalanche breakdown is
a gradual process that starts at low current levels and for electric fields somewhat
below the breakdown field. The electrons generated by the avalanche process flow
into the drain and contribute to the drain current. The avalanche-generated holes
generally flow through the substrate to the body terminal. Since the substrate has a
nonzero resistance, a voltage drop is produced as shown. This potential difference
drives the source-to-substrate pn junction into forward bias near the source terminal.
The source is heavily doped n-type; thus, a large number of electrons can be injected
from the source contact into the substrate under forward bias. This process becomes
GD
S
nϩ Ϫ nϩ
ϩ
p ϩ ϩ Ϫ E-field
Ϫ
E IE ICBO C
␣IE
B
(a) (b)
Figure 11.24 | (a) Substrate current–induced voltage drop caused by avalanche
multiplication at the drain. (b) Currents in the parasitic bipolar transistor.
1 1 . 4 Additional Electrical Characteristics 467
severe as the voltage drop in the substrate approaches 0.6 to 0.7 V. A fraction of the
injected electrons diffuses across the parasitic base region into the reverse-biased
drain space charge region where they also add to the drain current.
The avalanche breakdown process is a function of not only the electric field
but the number of carriers involved. The rate of avalanche breakdown increases as
the number of carriers in the drain space charge region increases. We now have
a regenerative or positive feedback mechanism. Avalanche breakdown near the
drain terminal produces the substrate current, which produces the forward-biased
source-substrate pn junction voltage. The forward-biased junction injects carriers
that can diffuse back to the drain and increase the avalanche process. The positive
feedback produces an unstable system.
The snapback or negative resistance portion of the curve shown in Figure 11.22
can now be explained by using the parasitic bipolar transistor. The potential of the
base of the bipolar transistor near the emitter (source) is almost floating, since this
voltage is determined primarily by the avalanche-generated substrate current rather
than an externally applied voltage.
For the open-base bipolar transistor shown in Figure 11.24, we can write
IC ϭ ␣IE ϩ ICB0 (11.36)
where ␣ is the common base current gain and ICB0 is the base-collector leakage cur-
rent. For an open base, IC ϭ IE, so Equation (11.36) becomes
IC ϭ ␣IC ϩ ICB0 (11.37)
At breakdown, the current in the B–C junction is multiplied by the multiplication
factor M, so we have
IC ϭ M(␣IC ϩ ICB0) (11.38)
Solving for IC we obtain
IC ϭ _MI_CB0 (11.39)
1 Ϫ ␣M
Breakdown is defined as the condition that produces IC → ϱ. For a single reverse-
biased pn junction, M → ϱ at breakdown. However, from Equation (11.39), break-
down is now defined to be the condition when ␣M → 1 or, for the open-base con-
dition, breakdown occurs when M → 1/␣, which is a much lower multiplication
factor than for the simple pn junction.
An empirical relation for the multiplication factor is usually written as
M ϭ __1 _ (11.40)
1 Ϫ (VCE/VBD)m
where m is an empirical constant in the range of 3 to 6 and VBD is the junction break-
down voltage.
The common base current gain factor ␣ is a strong function of collector current
for small values of collector current. This effect will be discussed in Chapter 12 on
bipolar transistors. At low currents, the recombination current in the B-E junction is a
significant fraction of the total current so that the common base current gain is small.
468 C H A P T E R 1 1 Metal–Oxide–Semiconductor Field-Effect Transistor: Additional Concepts
As the collector current increases, the value of ␣ increases. As avalanche breakdown
begins and IC is small, particular values of M and VCE are required to produce the con-
dition of ␣M ϭ 1. As the collector current increases, ␣ increases; therefore, smaller
values of M and VCE are required to produce the avalanche breakdown condition. The
snapback, or negative resistance, breakdown characteristic is then produced.
Only a fraction of the injected electrons from the forward-biased source-substrate
junction are collected by the drain terminal. A more exact calculation of the snap-
back characteristic would necessarily involve taking into account this fraction; thus,
the simple model would need to be modified. However, the above discussion quali-
tatively describes the snapback effect. The snapback effect can be minimized by
using a heavily doped substrate that will prevent any significant voltage drop from
being developed. A thin epitaxial p-type layer with the proper doping concentration
to produce the required threshold voltage can be grown on a heavily doped substrate.
Near Punch-Through Effects Punch-through is the condition at which the drain-
to-substrate space charge region extends completely across the channel region to the
source-to-substrate space charge region. In this situation, the barrier between the
source and drain is completely eliminated and a very large drain current would exist.
However, the drain current will begin to increase rapidly before the actual
punch-through condition is reached. This characteristic is referred to as the near
punch-through condition, also known as Drain-Induced Barrier Lowering (DIBL).
Figure 11.25a shows the ideal energy-band diagram from source to drain for a long
n-channel MOSFET for the case when VGS Ͻ VT and when the drain-to-source voltage
is relatively small. The large potential barriers prevent significant current between the
drain and source. Figure 11.25b shows the energy-band diagram when a relatively
large drain voltage VDS2 is applied. The space charge region near the drain terminal
is beginning to interact with the source space charge region and the potential barrier
is being lowered. Since the current is an exponential function of barrier height, the
current will increase very rapidly with drain voltage once this near punch-through
Source Channel Drain Ec eVDS1
EF
Ev eVDS2
eVDS EFs
Ec
EFd
Ev (b)
(a)
Figure 11.25 | (a) Equipotential plot along the surface of a long-channel MOSFET.
(b) Equipotential plot along the surface of a short-channel MOSFET before and
after punch-through.
1 1 . 4 Additional Electrical Characteristics 469
ID
0
VDS
Figure 11.26 | Typical I–V character-
istics of a MOSFET exhibiting punch-
through effects.
condition has been reached. Figure 11.26 shows some typical characteristics of a
short-channel device with a near punch-through condition.
Objective: Calculate the theoretical punch-through voltage assuming the abrupt junction EXAMPLE 11.5
approximation.
Consider an n-channel MOSFET with source and drain doping concentrations of Nd ϭ
1019 cmϪ3 and a channel region doping of Na ϭ 1016 cmϪ3. Assume a channel length of L ϭ
1.2 m, and assume the source and body are at ground potential.
■ Solution
The pn junction built-in potential barrier is given by
͑ ͒ ͓ ͔Vbi ϭ Vt ln
_Na Nd ϭ (0.0259) ln _(101_6)(10_19) ϭ 0.874 V
n2i (1.5 ϫ 1010)2
The zero-biased source–substrate pn junction width is
_2(11.7_)(8.85_ϫ 10_Ϫ14)(0_.874) 1͞2
(1.6 ϫ 10Ϫ19)(1016)
͓ ͔ ͓ ͔xd0 ϭ
_2⑀sVbi 1͞2 ϭ ϭ 0.336 m
eNa
The reverse-biased drain-substrate pn junction width is given by
_2⑀s(V_bi ϩ _VDS) 1͞2
eNa
͓ ͔xd ϭ
At punch-through, we will have
xd0 ϩ xd ϭ L or 0.336 ϩ xd ϭ 1.2
which gives xd ϭ 0.864 m at the punch-through condition. We can then find
Vbi ϩ VDS ϭ _x2d e_Na ϭ _(0.864_ϫ 10_Ϫ4)2(1_.6 ϫ 1_0Ϫ19)(_1016)
2⑀s 2(11.7)(8.85 ϫ 10Ϫ14)
ϭ 5.77 V