PowerElectronicsConvertersandRegulatorsThirdEdition-1

232 I LM 4 PWM DC/DC Converters

i C (t) t
I CM
I Lm

Fig. 4.12 Waveform of collector current

the considerations which follow it will be taken into account that the base current
rises exponentially, determined by the time constant τb.

The transition phenomena in semiconductor devices will be analyzed by
applying the charge control method which allows unique determination of turn-on/
turn-off and delay times of the transistor and the diode and the variations of the
currents during these intervals.

Transistor Turn On and Diode Turn Off

The variation of the current through the choke during the transient process is
negligibly small. The amplitude of the overshoots of the collector current
(Fig. 4.12) depends on the selected transistor and diode.

The variation of the base current of the controlling transistor during the turn-on
process is

ð4:64Þ
ibðtÞ ¼ Ib 1 À eÀt=sb ;

where τb—time constant of the base circuit, and Ib—constant base current. The
collector current can be determined by applying the equation of charge continuity
within the base region (Chap. 2). Since the initial condition is Q(0) = 0, then

"#
sb
icðtÞ ¼ bIb 1 À 1 1 sb eÀt þ 1 sc sb Àt ; ð4:65Þ
À sc sc sc
À esb

where β is the common emitter current gain of the transistor and τc = τβ = 1/(2πfβ),
and fβ is the cutoff frequency of the common emitter current gain. Upon application
of the reverse bias, the diode is still conducting for some time. Namely, until the
excess minority carriers surrounding the p–n junction are completely swept away,

the diode will be in the state of conduction. The current through it is

idðtÞ ¼ ILm À icðtÞ; ð4:66Þ

where ILm is the minimum current through the choke.
It is of interest to determine the storage time of the diode (the time of discharge),

because during that time the diode has a very small resistance and makes a high

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4.1 Forward Converters 233

load for the transistor. The fall time of the diode current in this case can be
neglected. By applying the charge control method the delay time can be uniquely
determined. Namely, the solution of the continuity equation gives the variation of
the charge in the vicinity of the p–n junction of the diode

<8Zs 9
=
QðtÞ ¼ eÀt=sd : idðtÞeÀt=sd dt þ Qð0Þ;;
ð4:67Þ

0

where id(t)—is the variation of the current through the diode, Q(0)—is the initial
charge in the diode and τd—is the time constant of the diode. Since Q(0) = τdILm,
taking into account (4.66) and (4.65), the solution of (4.67) is obtained in the form

1þÀðesÀb tÀ=sbsþcÞsðÁ2bsðcsbÀÀsbsÞdsÁÞ2cð secÀÀt=ssb dÀÞ eeÀÀt=t=sdsc À! eÀt=sd
:
QðtÞ ¼ I1sd À bIbsd

ð4:68Þ

At the end of the storage time, the excess charge in the vicinity of the p–n
junction is zero, i.e.,

QðtrÞ ¼ 0: ð4:69Þ

From (4.69) and (4.68), after rearrangement, it follows

1 ¼ 1 À K1 eÀtr =sc À K2eÀtr=sc þ K3eÀtr=sb ; ð4:70Þ
N

where N ¼ bIb ,—the coefficient of saturation of the transistor after turn-on,
I1

K1 ¼ ðsc À s2d À sdÞ ;
sdÞ ðsb

K2 ¼ ðsc À s2c À sdÞ , and ð4:71Þ
sbÞ ðsC

K3 ¼ ðsc À s2b À sdÞ :
sbÞ ðsb

Owing to a mathematical inconsistency in certain relations between time con-
stants while solving (4.67), there are restrictions to the validity of Eq. (4.70). Two
extreme cases are of practical interest.

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234 4 PWM DC/DC Converters

1. When τb ≈ 0, then

ð4:72Þ
icðtÞ ¼ bIb 1 À eÀt=sc :

2. If τc ≈ 0 (τc ≪ τb), it follows that ð4:73Þ


icðtÞ ¼ bIb 1 À eÀt=sb :

In the first case (τb ≈ 0) it follows

1 ¼ 1 þ sc sd sd eÀtr=sd À sc sc sd eÀtr=sc ; ð4:74Þ
N À À

and in the second (τc ≪ τb)

1 ¼ 1 þ sd eÀtr=sd À sb eÀtr=sd : ð4:75Þ
N sb À sd sb À sd

The graphical solution of Eqs. (4.70), (4.74), and (4.75) for different ratios of the
time constants, τd/τc and τb/τc, is shown in Fig. 4.13a, b. It is obvious that the storage
time decreases with an increase of the coefficient of transistor saturation and with a
decrease of the time constant of the base current. Figure 4.14 shows the dependence

of the storage time on the ratio of the time constants of the diode and the transistor
(τd/τc) with the coefficient of saturation of the transistor taken as a parameter.

Of particular interest is to establish how the amplitude of the current pulses

depends on the ratio of the time constants of the diode and the transistor. In the case
when τd > τc and τb ≈ 0 the overshoots of the transistor current could be very high.
Namely, it could then be assumed that the transistor is turned on instantaneously, so
the current through the transistor, while the diode is still conducting, is equal to βIb
(Fig. 4.15).

12
11 d / c=0.1

tr / d 10
tr / d
4 9
3.5 d / c=0.9
8 b / c=0.8
3 7
2.5 b / c=3.5 0.6
2.5 6 0.4
1.5 5
2 4 0.2

1.5 0.5 3 0.0

1 0.0 2

0.5 1

0 1 2 3 4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10
N
N

Fig. 4.13 Rise time as a function of the coefficient of transistor saturation

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4.1 Forward Converters 235
Fig. 4.14 Storage time as
function of collector and ts / c 2
diode currents
N=2
Fig. 4.15 Waveforms of τd/τc
with the saturation factor as a 1
parameter N=5

0 10
0.1 1
d/ c
iC (t) βIb
I Lm I LM
t

i d (t) ts

t

When the storage time ts is determined, it is then straightforward to determine
the current overshoots for each specific case. Therefore, the maximum collector

current is

1 sb=sc !
sb=sc À sb=sc
Im ¼ bIb 1 À 1 À eÀtr =sc þ 1 eÀtr =sb : ð4:76Þ

Figure 4.16a, b shows a graphical representation of the dependence of the ratio
ICM/ILm on the transistor saturation coefficient for different ratios of the time con-
stants sd=sc and sb=sc.

The dependence of the amplitude of the current pulses on the time constants is

shown in Fig. 4.17.

It can be seen that the amplitude of the collector current increases with the
increase of the saturation coefficient (the transistor is turned on faster) and with the

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236 4 PWM DC/DC Converters

(a) (b)

4 1.6
1.5
d / c=0.9 b / c=0 d / c=0.1
b / c=0
3.5 ICM /ILm
ICM /ILm
0.5 0.4
3 1.4 0.8

2.5 1.5 1.3

2 3.5
1.2

1.5 1.1

1 1
1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10
N
N

Fig. 4.16 Maximum collector current as a function of the saturation factor N with the ratio of the
time constants sd=sc (a) and sb=sc (b) taken as a parameter

Fig. 4.17 ICM as function of 5
the ratio of the time constants
ICM /ILm
4

3 b >> c

2 b= d b << c

1

01234

b/ d

increase of the time constant τd (tr increases). However, by increasing the time
constant of the base current, ICM decreases. Therefore, in the design of a converter a
diode having as small time constant τd as possible should be selected, and if
necessary, the turn-on process of the transistor should be slowed down by

increasing τb.

Transistor Turn-Off

If the transistor is turned off by a negative base current –Ib2 and with the initial
condition Q(0) = τcICM/β, the application of the charge control method gives the

collector current

icðtÞ ¼ ðILM þ bIb2ÞeÀt=sc À bIb2; ð4:77Þ

where ICM is the maximum current of the choke of the output filter. The turn-off
time of the transistor can be determined from the condition ic(t) = 0, so

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4.1 Forward Converters 237


1
tf ¼ sc ln 1 þ N2 ; ð4:77aÞ

where 1/N2 = (ILM/βIb2). If the negative base current is not provided (N2 = 0), the
turn-off time can be determined from the condition ic(tf) = 0.1ILM, therefore, taking
into account (4.77), it follows that tf = 2.3τc.

Power Losses

Power losses in semiconductor devices during transient processes consist of the
losses during the storage time of the diode and the losses during the transistor turn-
off process while the diode is conducting. Figure 4.18 shows the waveforms of the
transistor and diode voltages and currents obtained with the integrated control at
50 kHz. Solid lines show current variations, and dotted lines voltage variations.
During the transistor turn-on and turn-off, it may be assumed that the collector–-
emitter voltage is approximately equal to the input voltage.

Power losses in the transistor during turn-on are defined by

VI Ztr
T
Ptr ¼ icðtÞ dt: ð4:78Þ

0

According to (4.65) and (4.78) it follows

VI N ðILm ÞILm ( À À eÀtr =sc Á sb À À eÀtr =sb Á)
T tr sc 1 1 :
Ptr ¼ À À ð4:79Þ
1 À sb=sc 1 À sc=sb

Fig. 4.18 Voltage and iC VCE
current waveforms ICM

ILm iC (t) VCE (t)

tr tt t
T- t
id Vd
ILm Vd (t) ILM id(t)

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238 4 PWM DC/DC Converters

Figure 4.19a shows the relative dependence of the dynamic power losses in the

transistor during its turn-on on the ratio τb/τd, for different ratios τd/τc. The power
losses in the transistor during turn-off are defined by

VI Ztf
T
Ptf % icðtÞ dt: ð4:80Þ

0

where ic(t) and tf are expressed by (4.77) and (4.78), respectively. The solution of
(4.80), taking into account (4.78), turns out to be

VIN2ILM À Á 1 !
T 1 1 N2 :
Ptf ¼ sc À eÀtf =sc À À tf ð4:81Þ

If instead of tf in (4.81) one introduces (4.77a), then

VIILMsc !
T 1
Ptf ¼ 1 À N2 ln 1 þ N2 : ð4:82Þ

By adding (4.79) and (4.82), one obtains the dynamic losses in the transistor
during its turn-on and turn-off.

From the dependence of relative power losses in the transistor during turn-off on
the factor N2 (Fig. 4.19b) it is noticeable that increasing of N2 decreases the power
of losses, thus one should strive to make N2 > 1. Since the turn-off time of power
transistors is quite long, it is necessary to provide a negative base current in order to
speed up the turn-off process.

The dynamic losses in the diode can be determined in a way similar to the one
applied to the transistor. During the storage time the variation of the voltage across
the diode can be neglected so it could be assumed that Vd = VDt and

(a) 3 (b)

Ptr /(VI ILm f d )
Ptr /(VI ILm f c )
2.5 d >> c 1
2

1.5 0.5
d= d
0.2
1 0.1

0.5 d << c 0 1 2 3 4 5 6 7 8 9 10
N2
0
0123456
b/ d

Fig. 4.19 Dynamic losses in the transistor during turn-on (a) and during turn-off (b)

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4.1 Forward Converters 239

VDt Ztr
T
P0dd ¼ idðtÞ dt; ð4:83Þ

0

where the diode current is expressed by (4.66). From (4.83), upon rearrangement,
one obtains that the average power of dissipation in the diode within one cycle
during the storage time is

Pd0 d ¼ VDtILm ftr À VDt Ptr; ð4:84Þ
VI

where Ptr is expressed by (4.79). The average power losses in the diode within one
cycle during the transistor turn-off process are defined by

VD Ztf
T
P0d0d ¼ idðtÞ dt: ð4:85Þ

0

Now the diode current is

idðtÞ ¼ ILM À icðtÞ; ð4:86Þ

where the collector current of the transistor ic(t) is given by (4.77). Upon
rearrangement

Pd00d ¼ VDILM f tf À VD Ptf ; ð4:87Þ
VI

where Ptf is determined by (4.82). The total power of dynamic losses is determined
by (4.84) and (4.87). Since VDt ≈ VD

Pdd ¼ VDf ðILmtr þ ILMtf Þ À VD ðPtr þ Ptf Þ: ð4:88Þ
VI

4.1.1.6 Parameter Optimization

The calculation of the optimum parameters is one of the most important, and at the
same time the most complex, tasks in the design of any system, thus the same is
valid in the design of DC/DC converters. It comprises the exact description of the
processes, power relations in all circuits and elements, the selection of a criterion
function, and the corresponding optimization algorithm. The mathematical models
of the circuits and devices include nonlinear functions; therefore the optimization
can only be performed with the aid of a computer.

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240 4 PWM DC/DC Converters

The optimization criteria depend on the goals, technical requirements, and output
parameters. The most frequent technical requirements for converters are: maximum
variation of the input voltage, output voltage stabilization, output power, electrical
and thermal regimes. The goal functions are usually minimum weight, volume,
price and maximum factor of efficiency. Consequently, optimization can be per-
formed by parts. The problem of optimization as a whole can be solved through the
application of specific subroutines for optimization of individual goal functions.
Basically, the most complex and at the same time the most important problem in the
design of converters is the optimization of the factor of efficiency. It is clear that the
thermal regime, particularly the regimes of the semiconductor devices, is dependent
on the power losses. Closely related are the cooling problems and also the volume
and the weight of the cooling system whose share in the overall measures of the
converter is very significant. Consequently, by determining the maximum factor of
efficiency the solution is obtained not only for the problem of minimum losses but
also for the problem of minimum weight and volume.

From the analysis of power losses it can be concluded that the total losses are
dependent on three independent parameters: the saturation coefficient of the tran-
sistor (N), the frequency of the controlling transistor (f), and the time constant of the
base current (τb). These are the parameters that a designer has to determine when
selecting an adequate transistor and diode in accordance with the specific technical
requirements. Therefore, the task of designing a minimum-loss converter (maximum
coefficient of efficiency) is reduced to the determination of optimum parameters N, f,
and τb. It should be noted that the listed parameters have limitations which are
automatically introduced into the process of searching for the optimum values.

There are a number of optimization methods for nonlinear functions of several
variables: the gradient method, method of second derivatives, and method of direct
search. For practical reasons, here is the most suitable method of direct search.

4.2 Galvanically Isolated Forward Converter

Another class of DC/DC converters is the forward converter with galvanically
isolated input and output (Fig. 4.20). In this converter, after the transistor Tr is
turned on, the energy from the primary circuit is transferred directly to the sec-
ondary. Simultaneously, through the diode D1 (D2 is off) this energy is accumulated
in the choke and fed to the load. While Tr is off, the energy from the choke is fed to
the load by the diode D2. During this interval the core of the transformer is
demagnetized through the third winding which is connected to the primary source
by the diode D3. In this process one part of the energy is returned to the input.

The third winding has to be closely coupled with the primary winding in order to
avoid voltage spikes while Tr is turning off. Usually these two windings have the
same number of turns. Then, the collector voltage of Tr while off approaches 2VI.

The presentation of the voltage and current waveforms in Fig. 4.20b implies that
the transformer and the switching elements (transistor and diodes) are ideal, and

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4.2 Galvanically Isolated Forward Converter iL L0 241
D2 C V0 RL
(a)

D1

iC i D3
VI D3

Tr
VB

(b)

VB

2VI
VI

V CE

iC

i D3 T
DT

iL VI /n - V 0 - V0 I LM
L0 L0

I0

DT I Lm

T

Fig. 4.20 Forward converter with separated input and output (a) and voltage and current
waveforms (b) in continuous mode

that the variation of the output voltage is negligibly small. The current through the
choke while Tr is conducting is given by

iLðtÞ ¼ ILm þ VI À Vo t; ð4:89Þ
n L0

and while Tr is off

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242 4 PWM DC/DC Converters

iLðtÞ ¼ ILM À Vo t; ð4:90Þ
L0

where ILm and ILM are the minimum and maximum currents through the choke Lo,
respectively. By equating the increase and the decrease of the current iL the output

voltage is obtained as

Vo ¼ D VI ; ð4:91Þ
n

where D = T1/T is the duty cycle of the control pulses (the ratio of the interval of
conduction of Tr and the total cycle T = T1 + T2), and n is the ratio of the primary
and the secondary number of turns. Thus, the output voltage does not depend on the
load current but only on the duty cycle of the control pulses (VI and n are constants).

The above analysis has been made under the assumption that the current through

the output choke was continuous. This is possible; however, while the transistor is
off the current drops to zero. Since filtering of the output voltage would then be
much more difficult, this mode is considered unsuitable and to be avoided. If the
discontinuity of the current through the choke Lo is to be avoided, the load current
has to be higher than the average value of the ripple of the current iL, i.e.,

I0 [ DiL ¼ ILM À ILm : ð4:92Þ
2 2

Since ILM = iL(DT), from (4.89) and (4.91) the boundary between the continuous
and the discontinuous mode of operation is

I0 [ VIT Dð1 À DÞ ¼ Iog: ð4:93Þ
2nL0

Figure 4.21 shows the normalized output characteristics of the converter for
different values of the duty cycle. In the discontinuous operating mode (to the left of
the dotted line) the output voltage is dependent on the load current. For this reason
the discontinuous mode should be avoided. This is accomplished by connecting a
constant load to the output (zero or intrinsic load) similarly to the converter without
a galvanic separation between the input and the output.

The collector current of the transistor linearly increases and consists of the
magnetization current of the primary winding and the current of the output winding
referred to as the primary circuit, i.e.,

ic ¼ iL þ VI t: ð4:94Þ
n LI

The collector current reaches maximum at the end of transistor conduction
(t = DT), so

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4.2 Galvanically Isolated Forward Converter 243

Vn = nV 0 =D
VI

0.5 D=0.6
0.5
Discontinuous Continuous mode 0.4

0.2

0 0.1 0.2 nI 0 L0
VI T
I n =

Fig. 4.21 Normalized output voltage as function of the load current and duty cycle

ICmax ¼ ILM þ nVo T: ð4:95Þ
n LI

The magnetization current is represented by cross-hatched areas in Fig. 4.20b.

Most of the time it can be neglected, so ICmax ≈ ICM/n.
After the transistor is off, the demagnetization diode D3 conducts and ensures the

flow of the discharging current from the core of the transformer. The voltage of the
third winding, approximately equal to −VI, is referred to as the primary winding
voltage. Owing to this the collector voltage is higher than VI. Since the core
discharging winding usually has the same number of turns as the primary, the

maximum collector voltage is

VCEmax ¼ 2VI: ð4:96Þ

Then the magnetization and demagnetization times are equal, so (4.96) applies
during the interval DT (Fig. 4.20b). This also means that the maximum ratio pulse/
(no pulse) has to be less than 0.5.

The required volume of the transformer core can be calculated by

V ¼ lolcIm2 ag LI ; ð4:97Þ
Bm2 ax

where Bmax is the maximum induction in the given material, μo and μc are physical
constants and

Imag ¼ nTVo
LI

is the magnetization current of the core.

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244 4 PWM DC/DC Converters

D2 D3 L0
T r2 D5 D4 C

VI V 0 RL
VB
T r1
D1

Fig. 4.22 Half-bridge forward converter

If the breakdown voltage of the selected transistor is lower than 2VI
(BVCBO < 2VI), the half-bridge forward converter using two transistors is recom-
mended (Fig. 4.22). The transistors are controlled so that they are both on or off.

When off, the diodes D1 and D2 are conducting, so

VCEmax % VI: ð4:98Þ

It should be emphasized that the forward converter can be used in a multioutput
version (Fig. 4.23). The output voltages are practically independent. Their ratio is
equal to the ratio of the number of the secondary turns.

The favorable features of the forward converters are:

• relative simplicity,
• the ripple (maximum variation) of the output voltage is significantly smaller

than that of the flyback converters.

+ L1

T1 D2

D3 C1 V 01 RL1

VI L2 V 02 RL2
D4 D5 C2

Tr
D1

-

Fig. 4.23 Two-output forward converter

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4.2 Galvanically Isolated Forward Converter 245

• the dimensions of the transformer are small and an air gap is not required, and
• there is no risk of the transformer core saturation.

Unfavorable features of the converters having isolated output are:

• the breakdown voltage of the switching transistor has to be twice the input
voltage (the exception is the half-bridge circuit),

• a separate winding is required for the demagnetization of the core.

Example 4.3 A forward converter having galvanic isolation (Fig. 4.20) is charac-
terized by the following parameters: VI = 48 V, Lo = 0.4 mH, C = 100 μF, N1/
N2 = 1.5, N1/N3 = 1, R1 = 10 Ω, f = 35 kHz, D = 0.4, and L = 5 mH. Determine:

(a) the output voltage,
(b) the maximum and minimum currents through the choke Lo,
(c) the maximum collector current of the transistor,
(d) the load resistance when the converter operates at the boundary between the

continuous and the discontinuous mode.

(a) According to (4.91): Vo = DVI(N1/N2) = 0.4 × 48/1.5 = 12.8 V
(b) The average value of the current through the choke Lo is equal to the load

current, II = IO = Vo/RL12.8/10 = 1.28 A.

The change of the current through the choke Lo is

DiL ¼ VI=ðN1=N2Þ À Vo DT ¼ ð48=1:5 À 12:8Þ Â 0:4 ¼ 0:55 A;
Lo ð0:4 Â 10À3Þð35 Â 103Þ

so the maximum and the minimum value are

ILM ¼ IO þ DiL=2 ¼ 1:28 þ 0:55=2 ¼ 1:55 A
ILm ¼ IO À DiL=2 ¼ 1:28 À 0:55=2 ¼ 1 A

(c) Taking into account (4.95) it follows

ICmax ¼ ILM þ VON1=N2 T ¼ 1:55 þ ð5 Â 12:8 Â 1:5 103Þ ¼ 0:55 A;
N1=N2 L1 1:5 10À3Þð35 Â

IOg ¼ VO ¼ VI Dð1 À DÞ;
RLg 2ðN1=N2ÞLof

(d) so

RLg ¼ 2Lof =ð1 À DÞ ¼ À Â 10À3ÁÀ35 Â 103Á=ð1 À 0:4Þ ¼ 46:67 X:
2 0:4

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246 4 PWM DC/DC Converters

4.3 Boost Converter

The supply voltages of some parts or of a complete unit are often higher than the
voltage of the primary source, like in portable professional equipment where bat-
teries are the primary source. In such cases the conversion and stabilization of the
voltage is carried out mainly in two ways. The conventional solution employs a so
called push–pull converter where the increase of the output voltage is accom-
plished, among other means, by an adequate transformer. The output voltage can be
from several times to several hundred times higher than the input voltage. When the
voltage ratio is 1 < Vo/VI < 5, the DC/DC converters—voltage boosters are mainly
used. The basic scheme of such a converter is shown in Fig. 4.24.

At the output of the control module (CB) a sequence of pulses is generated and fed
to the switching transistor Tr. When the output of the control module is high, the
transistor Tr is on and in saturation. The current and magnetic flux in the core start
increasing. The diode D is off and it separates the load from the low-resistance part of
the circuit (collector–emitter of the transistor). The load current is maintained by the
energy stored in the capacitor. When the output of the control module is low, the
transistor is off. Then the magnetic flux in the choke decreases and the electromotive
forces in the winding are pulling in the direction opposite to that while the transistor
was on. The diode is conducting and the output voltage is the sum of the input voltage
and the voltage across the choke. The current through the choke decreases and reaches
its minimum when the transistor is switched on. This cycle is repeated periodically.

The power delivered to the load can be divided in two parts. The first part is
delivered directly by the input voltage (VI) source. The second part is obtained on
account of the electromagnetic energy that was stored in the choke while the
transistor was in saturation. The ratio of the conduction and the nonconduction time
of the transistor controls the stored electromagnetic energy and consequently the
ratio of the output and the input voltage.

4.3.1 Analysis of the Basic Scheme

For the purpose of the analysis of the basic parameters the following justifiable
assumptions will be made: the transistor and diode are ideal switches (instantaneous

Fig. 4.24 Basic scheme of +L D +
boost converter VI Tr C RL V0

PWM
(CM)

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4.3 Boost Converter 247

turning on or off, the on-resistance is negligibly small, the off resistance is infinitely
large), the Ohmic resistance of the choke is negligible, the output voltage Vo and the
load current Io are constant.

When the transistor is on, the complete input voltage is across the choke, so

VI ¼ L diL : ð4:99Þ
dt

By integrating the last equation, one obtains the current through the choke

iLðtÞ ¼ ILm þ VI t; ð4:100Þ
L

where ILm is the minimum current through the choke. After the transistor is turned
off, the circuit is closed through the load RL, the diode, the choke L, and the input
VI. By neglecting the voltage drop across the diode, it follows

VI À Vo ¼ L diL : ð4:101Þ
dt

The integration of (4.101) gives

iLðtÞ ¼ ILM þ VI À Vo t; ð4:102Þ
L

where ILM is the maximum current through the choke. The minimum and maximum
currents through the choke are obtained at the instant when the transistor is turned
on and off, respectively. Namely

ILm ¼ ILM þ VI À Vo ðT À sÞ; ð4:103Þ
L ð4:104Þ

ILM ¼ ILm þ VI s:
L

By equating the changes of the current through the choke while the transistor is
on and off, it turns out that

Vo ¼ ð1 VI : ð4:105Þ
À DÞ

The variation of the output voltage as function of the duty cycle is shown in

Fig. 4.25a. It can be seen that the output voltage is always higher than the input
voltage. Since usually D < 0.8, the output voltage can be controlled within limits
VI < Vo < 5VI. Essentially, the limitation on the ratio Vo/VI is imposed by the real
parameters of the elements of the converter. Namely, the resistances of the con-
ducting transistor and diode are greater than zero. The series resistance of the

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248 4 PWM DC/DC Converters

(a) 12 (b) A

V0 VL
VI 10 VI

8 ideal

-A t

6 VI -V0

4 iL
I LM
2 real
I Lm
0
0 0.2 0.4 0.6 0.8 1.0

t

Fig. 4.25 Normalized output voltage as function of the duty cycle (a) and the current and voltage
waveforms of the choke (b)

capacitor and the windings exists. The transient times are also not zero. All these
contribute to the real characteristic Vo/VI = f(D) shown by the dashed line in
Fig. 4.25a. The influence of the real parameters is particularly marked for large
values of the duty cycle.

Since it has been assumed that the scheme was ideal, the power losses in the
converter are negligible, thus PI = Po, or

VIIIsr ¼ V0IO: ð4:106Þ

From (4.105) and (4.106) it turns out that the ratio of the output current and the
average value of the input current of the converter is

IO ¼ 1 À D: ð4:107Þ
IIsr

Example 4.4 Draw the characteristics Vo/VI = f1(D) and η = f2(D) of a boost
converter with rL/RL = 0.01 or rL/RL = 0.05, where rL is the series resistance of the
choke and RL is the load resistance.

If other elements of the converter were ideal the power losses would exist only in
the series resistance rL of the choke. The input power is P1 = Po + PrL, or

VIIIsr ¼ II2srrL þ VoIO:

The average value of the current through the choke is determined by (4.107), so

VI 1 IO D ¼ rL ð1 IO2 þ VoIO:
À À DÞ2

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4.3 Boost Converter 249

7 Ideal Ideal
(r L =0) (r L =0)
6 V0
5 VI 1.0

4 r L =0.01 0.8 rL =0.01
η RL

3 RL 0.6

2 0.4 rL =0.05
RL
1 r L =0.05 0.2
RL
0
0 0 0.2 0.4 0.6 0.8 1.0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
D
D

Fig. 4.26 Vo/VI = f1(D) and η = f2(D)

Since IO = Vo/RL, it turns out that

Vo ¼ 1 1 D 1 þ 1 : ð4:108Þ
IO À
rL
RL ð1ÀDÞ2

The coefficient of efficiency is specified as

g ¼ Po ¼ Vo2=RL ¼ Vo2=RL ¼ 1 : ð4:109Þ
þ PrL Vo2=RL þ rLII2sr
Po Vo2=RL þ rL ðVo =RL Þ2 1 þ rL
ð1ÀDÞ2 RL ð1ÀDÞ2

On the basis of (4.108) and (4.109) follows


Vo g Vo
VI ¼ 1 À D ¼ g VI :

ideally

Functions Vo/VI = f1(D) and η = f2(D) are shown in Fig. 4.26. It is obvious that
losses in the series resistance of the choke rise sharply as the duty cycle approaches
unity.

4.3.1.1 Operating Modes of the Transistor and Diode

The maximum currents and the maximum reverse voltages of the transistor and
diode should be determined. Figure 4.25b shows the variation of the current
through the choke, the transistor, and the diode as a function of time, neglecting
transient phenomena. The maximum current of the transistor is equal to the max-
imum current of the choke ILM.

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250 4 PWM DC/DC Converters

It is of practical interest, however, to determine the relation between the maxi-
mum transistor current and the load current. Since the load current is given by

ID ¼ ILm þ ILM ð1 À DÞ;
2

it is straightforwardly shown that

Icmax ¼ IO T À VI À Vo ðT À sÞ: ð4:110Þ
À 2L
T s

From (4.105) and IO = Vo/RL it follows that

ICmax=IO ¼ 1 1 D þ RLT Dð1 À DÞ: ð4:111Þ
À 2L

Figure 4.27 shows the ratio ICmax/Io as a function of the duty cycle and with the
constant K1 = RLT/L taken as a parameter. The maximum current through the diode
is equal to the maximum current through the transistor.

By neglecting the voltage drop across the diode, the collector–emitter voltage of
the transistor, when off, is equal to the output voltage. The same conclusion may be

drawn for the reverse voltage of the diode, i.e.,

VCB ¼ jVDinvj ¼ VI=ð1 À DÞ:

In order to reduce the currents and the reverse voltages of the semiconductor

devices, a three-terminal choke is used (Fig. 4.28).

This also simplifies the design of the control module because for a given ratio
Vo/VI the variation of the duty cycle is reduced. Let N12 and N13 be the number of
turns between the points 1 and 2 and 1 and 3, respectively, and their ratio n = N13/
N12. It can be shown that the output voltage as a function of the transformation ratio
n is expressed by

Fig. 4.27 Normalized 11
maximum current as function
of the duty cycle I CM
I0 9
40
7
20
5 10
2
3
0.2 0.4 0.6 0.8 1.0
1
D

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4.3 Boost Converter (a) 251

Fig. 4.28 Converter using + 12 3D +
three-terminal chokes with RL V0
switching transistor (a), and VI Tr C
diode (b) connected to middle -
terminal
+
- RL V0

CM -

(b)

1 32 D
+
L C
Tr
VI

-

CM


nD
Vo ¼ VI 1 þ 1 ÀD : ð4:112Þ

Therefore, (4.105) is a special case of (4.112) for n = 1. Figure 4.29a presents the
dependence of the output voltage on the duty cycle with the transformation ratio
taken as a parameter.

If the reverse voltage of the transistor is critical, the circuit in Fig. 4.29a is used.
The maximum collector-base voltage in this case is lower than the output voltage
and amounts

(a) 12.8 n=Const. (b) 1.0 D=Const.

V0 5 6.4 VCBmax 0.2
VI V0 0.8 0.4
3.2
4 0.5 0.6
D=0.8
1.6

3 0.8
0.4

0.4
2 0.2

n=0.2

1 0 357 10
0 0.1 0.3 0.5 0.7 0.9 1

D n

Fig. 4.29 Normalized output voltage (a) and normalized collector–base voltage as functions of
n and D (b)

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252 4 PWM DC/DC Converters

VCBmax ¼ 1 þ Vo À 1Þ : ð4:113Þ
Dðn

Equation (4.113) applies only if n > 1, whereas for n < 1 (Fig. 4.29b)
VCBmax = Vo. Figure 4.29b presents the dependence of VCBmax/Vo on the transfor-
mation coefficient n with the duty cycle D taken as a parameter.

The maximum reverse voltage of the diode is

VDinv ¼ nVI : ð4:114Þ
1ÀD

4.3.2 Variation of the Output Voltage

The variation of the output voltage is equal to the variation of the voltage across the
capacitor. While the transistor is on, the load current is kept constant on the account
of the discharge of the capacitor C. The variation of the voltage across the capacitor
is then

vc0 ¼ VCmaxeÀt=CRL ; ð4:115Þ

where VCBmax is the maximum output voltage which is obtained at the end of the
interval when the transistor is off. At t = τ = DT the output voltage is at minimum

and its variation is determined by

Dvc0 ¼ VCmaxð1 À eÀDT=CRL Þ: ð4:116Þ

In order to keep the load current constant, the condition DT ≪ CRL has to be
fulfilled, so (4.116) is approximately

D v0c % VCmax DT : ð4:117Þ
CRL ð4:118Þ

Since Δvc′ ≪ Vo and taking into account (4.105), it follows that

D v0c % TVI 1 D D :
CRL À

The resistive component of the voltage variation across the capacitor is
expressed by ic(t)RC and it represents the voltage drop across the series active
resistance of the capacitor. The maximum value of this voltage is obtained at the

end of the pause, and it amounts

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4.3 Boost Converter 2.5 253

Fig. 4.30 Minimum 2.0 1
capacitance versus duty cycle tgδ /(2π ) = Const.
0.15
Cmin 1.5 0.015
T
0.3 0.5 0.7 0.9
RL ΔV0 /V0 1.0
D
0.5

0.1

Dv0c0 ¼ RCICmin; ð4:119Þ

where

ICmin ¼ VI DÞ2 À VIT D ð4:120Þ
RLð1 À 2L

is the minimum collector current. The overall variation of the output voltage is

VI T D RC D TDRLRC !
RL Cð1 À ð1 - D)2 2L
DV o ¼ Dv0c þ Dvc00 ¼ DÞ þ À : ð4:121Þ

From (4.121), one can determine the minimum value of the capacitance for
which the variation of the output voltage does not exceed a permitted variation

!
VoT D þ tgd 1 K1 Dð1 À DÞ
C [ RL DVo 2p À À 2 ; ð4:122Þ
1 D

where K1 = TRL/L and tgδ is the tangent of the angle of losses of the capacitor.
Figure 4.30 shows the relative dependence of the minimum capacitance on the

duty cycle with the constant tgδ/(2π) as parameter. It can be seen that for a given
ΔVo the minimum capacitance increases with an increase of the duty cycle and this
dependence is more pronounced for higher values of tgδ.

Example 4.5 The boost converter (Fig. 4.24) is characterized by the following
parameters: VI = 50 V, τ = DT = 50 μs, L = 250 μH, and RL = 2.5 Ω. The transistor
and the diode can be considered ideal. One should determine:

(a) the frequency of control pulses for which the output voltage is 75 V, and the
converter operates in the continuous mode,

(b) the average values of the input and the output current,
(c) the capacitance of the output capacitor for which the variation of the output

voltage is not greater than 1 %.

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254 4 PWM DC/DC Converters

(a) According to (4.105) it follows that D = 1 − VI/Vo = 1 − 50/75 = 1/3, and from
DT = 50 μs: T = 50/D = 50 × 3 = 150 μs, or f = 1/T = 6.66 kHz.

(b) The average value of the load current is Io = Vo/RL = 75/2.5 = 30 A, and
according to (4.107) the average value of the input current is

IIav ¼ IO=ð1 À DÞ ¼ 30=ð1 À 1=3Þ ¼ 90=2 ¼ 45 A:

The variation of the current through the choke is

DiL ¼ VI DT ¼ 250 50 50 Â 10À6 ¼ 10 A:
L Â 10À6

The maximum and the minimum current through the choke are respectively

ILM ¼ IIsr þ DiL=2 ¼ 45 þ 10=2 ¼ 50 A;
ILm ¼ IIsr À DiL=2 ¼ 45 À 10=2 ¼ 40 A:

The variations of the current and the voltage of the choke are shown in
Fig. 4.31a.

(a) VL VL Δi L =10A
VI =50V 200 t( s)
i L (A)
50
45
40

25 0 50 - ( V0 -VI )=-25V 150
(DT) (T)
(b)

i C (A)
30

I crms
(21.3A)

50 150 200 t( s)
-10

-20

Fig. 4.31 Variations of the current and the voltage of the choke (a) and the waveform of the
current through the capacitor (b)

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4.3 Boost Converter 255

(c) Since the ESR of the output capacitor is neglected, the variation of the output
voltage is determined by (4.116), so

C [ TD ¼ 50 Â 10À6 ¼ 200 lF:
RLðDVo=VoÞ 25 Â 0:01

The waveform of the current through the capacitor is shown in Fig. 4.31b.
From this it follows that the average square value of the current through the
capacitor is

ICeff ¼ ICrms ¼ tvuuuTffi1ffiffiffiZffiffiffiTffiffiffiiffi2CffiffiffiðffiffitffiÞffiffiffidffiffiffitffi ¼ uutvuffiZffi5ffiffi0ffiffiffi3ffiffi0ffiffi2ffiffiffiffidffiffitffiffiffiþffiffiffiffiZffi1ffiffi0ffiffi0ffiffi ffiffiffiffiffi1ffiffi0ffiffiffiffiffitffiffiÀffiffiffiffiffi2ffiffi0ffiffiffi ffiffiffi2ffiffiffidffiffiffitffi ¼ 21:3 A:
100

0 00

ICrms ¼ 21:3 A:

4.3.3 Boundary Between the Continuous
and the Discontinuous Mode

The previous analysis applies if the current through the choke is continuous. At the
boundary between the continuous and the discontinuous mode the minimum current
through the choke is zero (Fig. 4.32a), so the average value of the current through
the choke at this boundary is

ILg ¼ DiL=2 ¼ ILM=2 ¼ VI DT ¼ VoT Dð1 À DÞ: ð4:123Þ
2L 2L

(a) i L

I LM V0 T D( 1 - D) (b) V0= Const.
2L 1 V0 T
I 0g I Lg 8L

I Lg I Lg

I =0 DT T t I 0g

Lm

VL VI 2 V0 T
A 27 L

-A

-( VI - V0) 0.25 0.5 0.75 1.0 D
1/3

Fig. 4.32 The current and voltage of the choke as functions of time (a) and the output current and
the average current through the choke at the boundary between the continuous and the
discontinuous mode as functions of the duty cycle (b)

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256 4 PWM DC/DC Converters

The average value of the current through the choke in the voltage boosters is
equal to the average value of the input current. By combining (4.123) and (4.107)
one obtains that the output current IOg at the boundary of the continuous mode is

IOg ¼ ILgð1 À DÞ ¼ VoT Dð1 À DÞ2: ð4:124Þ
2L

The usual requirement is that the output voltage is constant. The boundary

currents IOg and ILg versus duty cycle, at VO = const., are shown in Fig. 4.32b.
The current through the choke has a maximum at D = 0.5

ILgmax ¼ TVo ¼ 0:125 TVo ; ð4:125Þ
8L L

whereas the maximum of the output current at the boundary is

IOgmax ¼ 2 TVo ¼ 0:074 TVo ; ð4:126Þ
27 L L

at D = 1/3. The values of the boundary currents ILg and IOg can be expressed in
terms of their maximum values

ILg ¼ 4Dð1 À DÞILgmax; ð4:127Þ
ð4:128Þ
IOg ¼ 27 Dð1 À DÞ2IOgmax:
4

4.3.4 Discontinuous Mode

As a consequence of an increase of the load resistance or a decrease of the load

current the converter switches over to the discontinuous operating mode. Allowing

the input voltage and the duty cycle in this process to be constant (in practice, the

duty cycle varies to keep the output voltage constant, but this does not change the
validity of the analysis under the assumption D = const.).

The current and the voltage of the choke are zero during (D + D1)T < t< T, which
corresponds to the interval D2T (Fig. 4.33a). This leads to a decrease of the average
value of the current through the choke IL and an increase of the output voltage.
Namely, the current iL ≠ 0 during (D + D1)T, its average value during one cycle is

IL ¼ ILM ðD þ D1ÞT ¼ VIDT ðD þ D1Þ: ð4:129Þ
2 T 2L

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4.3 Boost Converter 257

(a)

VB

T t
i L I LM

IL= VI T D ( D + D1)
2L

DT D1 T t
VL VI
D2 T
A

t

-(VI - V0) -A
V0= Const.
(b) D
V0 / VI =4
1.0

0.75

0.50 Discontinuous V0 / VI =2
Continuous
1/3
0.25 mode
V0 / VI =1.25

0
0 0.25 0.5 0.75 1.0 1.25 I0 / I 0 gmax

Fig. 4.33 Current and voltage of the choke in the discontinuous mode (a) and the duty cycle as
function of the normalized output current and ratio Vo/VI at a constant output voltage (b)

On the other hand, the integral part of the voltage across the choke during one
cycle is zero, or the absolute values of the areas above and below the time axis are
equal, i.e.,

VIDT ¼ ÀðVI À VoÞDIT; ð4:130Þ

therefore

Vo ¼ D þ D1 : ð4:131Þ
VI D1

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258 4 PWM DC/DC Converters

Since the power losses of an ideal circuit are negligible, PI = Po and

IO ¼ D D1 : ð4:132Þ
IIsr þ D1

The input current and the current through the choke are equal, so IIav = IL. By
combining (4.133) and (4.129) it turns out that the output current in the discon-
tinuous mode is

IO ¼ VIT DD1: ð4:133Þ
2L

In practice, the usual requirement is that Vo = const. in the discontinuous mode
too. This can be accomplished by varying the duty cycle D as a function of the
output current while keeping the ratio Vo/VI constant. From (4.123), (4.125), and
(4.126) one obtains that

sffiffiffiffiffiffiffiffiffiffiffiffi ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
4 Vo Vo IO
D¼ 27 VI VI À 1 IOgmax : ð4:134Þ

Figure 4.33b shows the duty cycle as a function of the normalized output current
for different values of the ratio Vo/VI. The dashed line parabola is the boundary
between the continuous and the discontinuous mode.

4.3.5 Power Losses

Power losses in individual elements will be analyzed in the manner similar to the
one applied for the forward converters. Power losses in the saturated transistor are
defined by

1 Zts
T
Pts ¼ Rsi2cðtÞ dt; ð4:135Þ

0

where Rs is the output resistance of a saturated transistor. If the turn-on and the turn-
off time of the transistor are neglected and taking into account (4.105), from
(4.135), after rearrangement, it turns out that

Pts ¼ IO2 Rs ð1 D " þ 1 2 À # ð4:136Þ
À DÞ2 1 12 VoT D2ð1 DÞ4 :
IOL

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4.3 Boost Converter 259

(a) 20 (b) 4

18 TRL =Const.
L
16
3 21
14
T RL
12 L =Const. 11
5
Pts 10 21 Pd -VDt I 0 2
I 02R S 8 I 02R d

6 11

4 1

2 5 1
1
0.1 0.3 0.5 0.7 0.1 0.3 0.5 0.8

D D

Fig. 4.34 Normalized losses in the transistor (a) and normalized losses in the diode (b)

The resistance Rs is defined by

Rs ¼ DV ce ¼ V ce ðILMÞ À VceðILm Þ ; ð4:137Þ
DI c ILM À ILm

where ILM and ILm are the maximum and the minimum transistor current, respec-
tively and ΔVce is the variation of the collector–emitter voltage of a saturated
transistor.

The average power losses during one cycle in a conducting diode is expressed by

Pd ¼ IO2 Rd 1 1 D " þ 1 2 À # þ VDtIO; ð4:138Þ
À 1 12 VoT D2ð1 DÞ4
IOL

where Rd is the differential resistance of the diode

Rd ¼ DVd=DId;

ΔVd is the variation of the voltage and ΔId = ILM − ILm is the variation of the current
of the conducting diode.

Figure 4.34a and b show the relative power losses of the conducting transistor
and the diode as functions of the duty cycle with the constant VoT/(IoL) as
parameter.

It can be shown that the average power losses during one cycle in the Ohmic
resistance of the choke and in the series resistance of the capacitor are respectively

PL ¼ IO2 RL ð1 1 " þ 1 2 À # ð4:139Þ
À DÞ2 1 12 VoT ð1 DÞ4 ;
IOL

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260 4 PWM DC/DC Converters

" D 1 2 #
IO2 RC 1 À 12 VoT DÞ3 :
PC ¼ D þ IOL D2 ð1 À ð4:140Þ

The average power losses during one cycle in the nonconducting transistor and
diode are respectively

Ptz ¼ VIIco; ð4:141Þ
ð4:142Þ
Pdz ¼ VIIDo 1 D D :
À

This analysis concerns the losses during the quasi-stable intervals. The dynamic
losses in the semiconductor devices (diode and transistor) can be determined in a
manner similar to the one applied for the forward converters.

4.4 Indirect Converter

The basic circuit is shown in Fig. 4.35. When the MOS transistor M is on, energy is
accumulated in the choke. Simultaneously, the diode is off and it separates the input
from the output. The load current is provided by the capacitor C. During the next
half-cycle, while the transistor M is off, the diode is on. Now the energy is
exchanged between the choke and the capacitor whereby the capacitor makes up for
the energy lost during the previous half-cycle.

Therefore, here the transfer of energy from the input to the output is indirect
(intermediary). Namely, during one half-cycle the input energy is accumulated in
the choke and in the next half-cycle, when the choke is separated from the input, the
accumulated energy is transferred to the output load. Sometimes the term “accu-
mulation” is used since the energy during one half-cycle is accumulated in the
choke and in the second half-cycle it is transferred to the load.

Fig. 4.35 Basic circuit of a IS M I0
indirect converter +
D -
VI L C+
- RL V0
+

PWM I0
(CM)

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4.4 Indirect Converter 261

Fig. 4.36 Voltages and VG VGG
current of the choke and the
equivalent circuit of the DT T t
indirect converter t
-A
VL VI - V0
A

iL
I LM

I Lm I0

t

M D -V0 M D -V0

iL +iL

+ RL VI L V L C RL
-
V I L -VL C

0 ≤ t ≤ DT DT ≤ t ≤ T

When the transistor M is on (VG = VGG), the voltage across the choke is constant
and equal to VL = VI − VDS ≈ VI (Fig. 4.36), so the current through the choke is a

linear function of time

iLðtÞ ¼ ILm þ VI t: ð4:143Þ
L

The diode is off, and the load current is provided only by the capacitor
C (Fig. 4.36, during 0 < t < DT).

During the second half-cycle (T − DT), when the transistor is off (VG = 0), an
electromotive force of the opposite sign is induced in the choke. Therefore, the

voltage across the choke changes the sign, switching the diode to the state of
conduction, so VL = −Vo − VD ≅ –Vo. The capacitor is now being recharged by the
energy accumulated in the choke (Fig. 4.36, for DT < t < T). If the variation of the
output voltage is neglected, the current through the choke is determined by

iLðtÞ ¼ ILM À Vo t: ð4:144Þ
L

In (4.143) and (4.144), ILM and ILm are the maximum and the minimum current
through the choke, respectively. The variations of the current iL in both half-cycles
are equal

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262 4 PWM DC/DC Converters

VI DT ¼ Vo T ð1 À DÞ; ð4:145Þ
L L

therefore, it turns out that

Vo ¼ VI 1 D : ð4:146Þ
ÀD

Since losses in idealized converter circuits are negligible, the power of the load
is equal to the power of the primary source, i.e., PI = VIII = VoIo, and taking into
account (4.146)

Io ¼ II 1 ÀD : ð4:147Þ
D

Depending on the duty cycle D any relation between the input and the output
voltage is possible (Vo > VI or Vo ≤ VI). Namely, for D > 0.5, Vo > VI; for D < 0.5,
Vo < VI and for D = 0.5, Vo = VI. For this reason these converters are often called
Step Up/Step-Down or Buck–Boost converters.

In addition, the output voltage is of the opposite polarity with respect to the input

voltage, so the converter in Fig. 4.34 is often called the reverse or inverting

converter.
The ratio Vo/VI as a function of the duty cycle D is shown in Fig. 4.37. The solid

line corresponds to the idealized circuit Eq. (4.14).
If real parameters of the circuit elements are taken, the function Vo/VI = f(D) is

shown by the dashed line in Fig. 4.37. The drain–source voltage of the turned-off

transistor is

VDS ¼ VI þ Vo ¼ VI=ð1 À DÞ ð4:148Þ

Fig. 4.37 Ratio Vo/VI as 4
function of duty cycle D
3
V0 Ideal
VI 2 Real

1

0 0 0.2 0.4 0.5 0.6 0.8 1.0

D

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4.4 Indirect Converter 263

Therefore, the breakdown voltage of the transistor has to be BVDS > VI/(1 − D),
which may be several times larger than the input voltage. For instance, if D = 0.8,
BVDS > 5VI.

4.4.1 Boundary Between the Continuous
and the Discontinuous Mode

At the boundary of the continuous mode at t = T, the current through the choke is
zero. With (4.144) in mind, the average current through the choke at the boundary
between the continuous and the discontinuous mode is

ILg ¼ 1 ILM ¼ VI DT ¼ VoT ð1 À DÞ: ð4:149Þ
2 2L 2L

The output current is IO = IL − II, and according to (4.149) and (4.147)

IOg ¼ VoT ð1 À DÞ2: ð4:150Þ
2L

The maximum values of the currents at the boundary are for D = 0

ILgmax ¼ VoT ¼ IOgmax ð4:151Þ
2L

Now (4.150) can be written in the form

IOg ¼ IOgmaxð1 À DÞ2: ð4:152Þ

4.4.2 Discontinuous Mode

In the discontinuous mode, the current and the voltage of the choke are zero during
the interval D2T (Fig. 4.38a). The average value of the current through the choke is

IL ¼ VIT DðD þ D1Þ: ð4:153Þ
2L

The absolute values of the areas above and below the time axis of the waveform
of the choke voltage (shaded areas in Fig. 4.38a) are equal, i.e.,

VIDT ¼ VoD1T; ð4:154Þ

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264 4 PWM DC/DC Converters

(a) DT T (b)

VG VGG D V0 = Const.

iL t
I LM 1.0

DT D 1T 0.75 V0 / VI =3
VL VI D 2T t V0 / VI =1

A -A 0.50
-V0
0.25 Continuous V0 / VI =0.25

Discontinuous mode

t0
0 0.25 0.5 0.75 1.0 1.25 I 0 / I 0gmax

Fig. 4.38 Current and voltage of the choke in the discontinuous mode (a) and the duty cycle as
function of the normalized output current and ratio Vo/VI at Vo = const. (b)

therefore it follows that

Vo ¼ D : ð4:155aÞ
VI D1

From the condition that the input and the output power are equal (Po = PI) and
(4.155a) it follows

IO ¼ D1 : ð4:155bÞ
II D

On the other hand, the output current is Io = IL − II, thus from (4.155b) and
(4.153) one obtains

VIT VoT VI 2
2L 2L Vo D2:
IO ¼ DD1 ¼ D12 ¼ IOgmax ð4:156Þ

In order to maintain the output voltage constant the duty cycle has to be made

variable. For this reason, it is useful to consider the dependence of the duty cycle on

the load current at Vo/VI = const. From (4.156) it follows

( qffiffiffiffiffiffiffiffiffiffiffi
VO ;IO
D¼ VI Á IO\IOg; discontinuous mode ð4:157Þ
IOgmax IO [ IOg; continuous mode

const.;

Equation (4.157) is shown graphically in Fig. 4.38b. The dashed line denotes the
boundary between the continuous and the discontinuous mode. In the range of the
continuous mode, the duty cycle does not depend on the output current but only on
the ratio Vo/VI.

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4.4 Indirect Converter 265

Example 4.6 For the indirect converter in Fig. 4.39:

(a) derive expressions for the Vo/VI versus duty cycle D in continuous mode,
(b) draw the waveforms of voltages and currents of the transistor, the inductor and

the diode,
(c) derive expressions for Vo/VI as a function of the duty cycle D in the discon-

tinuous mode, and
(d) repeat (b) for the discontinuous mode.

+ v1 i1 + v2
VI C1
+ iL i2 +

vL C vo R

Fig. 4.39 Indirect DC/DC converter

(a) In the case of D < 1/2 it follows that Vo < VI, while if D > 1/2 one obtains that
Vo > VI. In the continuous mode the waveforms of the marked voltages and
currents are shown in Fig. 4.40a.

For the time interval 0 < t < DTS, when transistor T leads, we get
i1 ¼ iL; v1 ¼ 0; i2 ¼ 0; v2 ¼ VI þ VO; vL ¼ VI. In this time interval the
input voltage source delivers energy to the inductor.
In the interval DTS < t < TS, the diode D leads, and the inductor delivers energy
to the load, so it follows

i1 ¼ 0; v1 ¼ VI þ VO; i2 ¼ iL; v2 ¼ 0; vL ¼ ÀVo:

Based on the condition that the average value of the voltage on the inductor is
equal to 0 it follows

vL ¼ 0 ) VIDTS À Voð1 À DÞTS ¼ 0 ) Vo ¼ D ; IO ¼ 1 À D
VI ÀD II D
1

ðPo ¼ PIÞ:

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266 4 PWM DC/DC Converters

(b) Waveforms of voltages and currents at the transistor, diode and inductor are
shown in Fig. 4.40a.

(c) For discontinuous mode it can be written that

(a) (b) iL iLmax

C

0 DTs t0 DTs D1Ts t
i1 i1 ILmax
Ts
iL1 -iLmax

iL0 t0 VI +Vo t
0 v1 VI
v1 VI +Vo
t
0 t0 iLmax
i2 iL1 i2 t

0 iL0 VI +Vo
v2 t0
v2
VI +Vo
Vo

0 iL1 t0 t
iL vL t
VI
iL0 I0
0
t0

-Vo

Fig. 4.40 Waveforms of marked voltages and currents of indirect converter for continuous (a),
and discontinuous working mode (b)

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4.4 Indirect Converter 267

ðD þ D1ÞTS 0 t 0 TS; iL ¼ 0; i2 ¼ 0;

i1 ¼ 0; vL ¼ 0; v2 ¼ Vo; v1 ¼ VI;

vL ¼ 0 ) VIDTS À VoD1TS ¼ 0

) Vo ¼ D ) D1 ¼ D VI ;
VI D1 Vo

IO ¼ i2 ¼ 1 iLmax D1 ) iLmax ¼ Vo D1TS
2 L

) IO ¼ VoTS D12 ¼ VoTS D2 VI2 ¼ Vo
) 2L 2L Vo2 ¼ R
VVoI 2¼
RTS D2 ¼ D2 ; k 2L ;
2L k RTS

Vo ¼ pDffiffi :
VI k

The operating conditions in the continuous mode are obtained from the
boundary value for the parameter D1, which is D1 = 1 − D. From this condition it
follows

VI 2 ð1 À DÞ2
Vo ) D2
k ¼ D2 kB ¼ D2 ; where kB ¼ ð1 À DÞ2:

For k > kB converter is in the continuous mode and D1 > 1 − D. For k < kB the
converter is in the discontinuous mode and D1 < 1 − D.

(d) The waveforms of voltages and currents at the transistor, the diode and the
inductor for the discontinuous mode are given in Fig. 4.40b.

4.4.3 Indirect Converter with Galvanic Separation

The indirect converter with galvanic isolation (flyback converter) (Fig. 4.41) has
found a very wide use. Here in addition to the galvanic separation of the input and
output, it is possible to have multiple outputs. The output can be of the same sign as
the input. The switching transistor is less loaded (lower maximum current) com-
pared to the basic circuit in Fig. 4.35.

The principle of operation is the same as for the basic circuit (Fig. 4.35). This
converter uses a choke with a double winding. The current flows alternately through
the primary and the secondary. While the transistor M is on (0 < t < DT), the diode
is off, so that the current flows only through the primary winding. During the
second quasi-stable interval (DT < t < T), the diode D is on and the transistor M is

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268 4 PWM DC/DC Converters

Fig. 4.41 Flyback converter n:1 D +
having galvanic separation

iP iS C + V0 i0 RL

-

VI M
VG V DS

off. The energy accumulated in the primary is transferred to the load via the sec-

ondary. In the idealized equivalent circuit (Fig. 4.41), the transformer is represented
by an ideal transformer, having a transformation ratio n = N1/N2, and the winding
having magnetization inductance Lm.

During the interval 0 < DT (Fig. 4.42a), the primary voltage is V1 = VI = const.
and the primary current is

iI ¼ ILm;m þ VI t; 0 t DT ð4:158Þ
Lm

where ILm,m is the minimum magnetization current. The primary and the secondary
winding are wound up in the opposite directions, thus the secondary voltage is
negative and the diode is off (iD = 0). The current IDS of the conducting transistor is
equal to the input current, and it reaches maximum at t = DT, i.e.,

IIM ¼ ILm;M ¼ IDSM ¼ ILm;m þ VI DT : ð4:159Þ
Lm

During DT < t < T, the transistor M is off and the diode is conducting
(Fig. 4.42b). The secondary voltage is equal to the output voltage, so the primary
voltage is VI = nVo. The current of the magnetization winding

iLm ¼ ILm;M À nVo ðt À DT Þ; DT t T; ð4:160Þ
Lm

is referred to the secondary as

iD ¼ niLm ¼ nILm;M À n2Vo t; DT t T; ð4:161Þ
Lm

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4.4 Indirect Converter 269

(a) Transformer D I0 (b) Transformer D I0
N1 :N2 N1 :N 2
II II

iLm + iD=0 + iLm + + iD +
Lm V- 1 - V0 L m V1 V2 = V0 - V0
-
+ +-
VI -
VI -

M M
iDS
iDS= 0

(c) Vg

iL DT T t
I Lm,m I LmM = I DSM t

iD n I Lm,M

n I Lm,m I 0

i Lm n I Lm,M t

n I Lm,m

V1 VI t
A

-A t
(1-D)T
-n V0
DT

Fig. 4.42 Equivalent circuits of the idealized circuit (a) and (b) and the characteristic waveforms
in the continuous mode (c)

The average value of the voltage VI is zero. In other words, the areas of the
voltage VI waveform with respect to the time axis are equal, i.e.,

VIDT ¼ nVoð1 À DÞT; ð4:162Þ

therefore it follows that

Vo ¼ VI ¼ 1 D D : ð4:163Þ
n À

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270 4 PWM DC/DC Converters

Therefore, compared to the basic circuit (Fig. 4.35) the output voltage of the

flyback converter with galvanic separation is lower n = N1/N2 times.
The DC component of the output current IO is equal to the average value of the

secondary current, or of the diode D, i.e.,

1 ZT n ZT nVo !
T T Lm
IO ¼ iDðtÞ dt ¼ ILm;M À ðt À DT Þ dt: ð4:164Þ

0 DT

After rearrangement it follows that

ILm;M þ ILm;m nVo !
2 Lm
IO ¼ nð1 À DÞ þ DT : ð4:165Þ

The preceding analysis concerns the continuous mode of the current through the

magnetization winding. In the discontinuous mode in the part of the quasi-stable

interval T − DT, when the transistor is off, the magnetization current iLm and the
voltage VI are equal to zero. Namely,

8
< 0; 0 t DT
DT t ðD þ D1ÞT
iLm ¼ : ILm;M À nV ðt À DT Þ; ðD þ D1ÞT t DT; ð4:166Þ
0; Lm

while

8
< VI; 0 t DT
DT t ðD þ D1ÞT
V1 ¼ : ÀnVo; ðD þ D1ÞT t DT: ð4:167Þ
0;

The positive and the negative area of the waveform of the voltage VI with respect
t the time axis are equal, i.e.,

VIDT ¼ nVoD1T; ð4:168Þ

therefore it follows that

Vo ¼ D : ð4:169Þ
VI nD1

In the idealized circuit, the input and the output power are equal
(PI = VIII = Po = VoIo), and the ratio of the average values of the input and the
output current is

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4.4 Indirect Converter 271

IO ¼ nD1 ; ð4:170Þ
II D

where

1 ZT 1 ZDT VI VIT
T T Lm 2Lm
II ¼ iIðtÞ dt ¼ t ¼ D2: ð4:171Þ

00

On the basis of (4.171), (4.169), and (4.168) it follows that

nVo ¼ D2 ; ð4:172Þ
VI 2IOn

where

IOn ¼ IO =ðnVI T =Lm Þ ¼ IOLm ð4:173Þ
nVIT

is the normalized output current. The normalized output static characteristics nVo/
VI = f(Ion) for different values of the duty cycle are shown in Fig. 4.41. At the
boundary between the continuous and discontinuous mode the output voltages

values according to (4.172) are equal, i.e.,

1 D D ¼ D2 ; ð4:174Þ
À 2IOng

where IOng is the normalized boundary value of the output current ð4:175Þ
IOng ¼ Dð1 À DÞ=2:

The maximum value of the drain–source voltage of a nonconducting transistor is

VDSmax ¼ VI þ nVo ¼ VI=ð1 À DÞ: ð4:176Þ

Thus, the breakdown drain–source voltage has to be (Fig. 4.43)

BVDS [ VIð1 À DÞ: ð4:177Þ

If this condition is not met, a circuit using two transistors (Fig. 4.44) is used.

Both transistors are simultaneously on or off. In the off state of M1 and M2, the
diodes D1 and D2 are conducting and keep the drain–source voltage to value
VDSmax = VI + VD ≈ VI.

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272 5 4 PWM DC/DC Converters
4
Fig. 4.43 Normalized output D = 0.8
static characteristics nVo/
VI = f(Ion) for different values
of the duty cycle

nV0 3 Discontinuous I 0ng= D (1-D) / 2 D = 0.7
VI
Continuous D = 0.6
2 mode D = 0.5
D = 0.4
1 D = 0.2

0 0.04 0.08 0.1 0.14 0.18 0.2
0

I 0n= I 0Lm
n VI T

Fig. 4.44 Flyback converter M2 D1
using two transistors (half-
bridge converter) n:1 D3 +

VI + +

C V 0 RL

D2 -

M1

The output of the flyback converter can be multiplied easily (Fig. 4.45). The core
of the transformer is common. For each additional output a secondary winding, a
diode and a capacitor are required. In doing so, it is possible to realize positive or
negative outputs. A negative output is obtained by the inverse winding of the
secondary and by inverting the diode.

The favorable properties of the flyback converters are:

• simplicity and low cost,
• insensitivity to shorting the output, and
• easy multiplication of the output.

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4.4 Indirect Converter 273

Fig. 4.45 Three-output + T1 D1 +
flyback converter +

C1 V01

+

D2 +
C2 V02

VI

D3 + +
C3 V03

M

The shortcomings are:

• drain current of the transistor is quite high,
• high stray inductance,
• the need for high power transformers in order to avoid core saturation (the cores

with an air gap are used), and
• at high output current a large capacitor is required for filtering the output

voltage.

Example 4.7 The indirect (flyback) converter in Fig. 4.41 has VI = 24 V, n = 3,
Lm = 1 mH, RL = 5 Ω, C = 100 mF, f = 50 kHz and Vo = 5 V (semiconductor
components can be considered ideal).

(a) Calculate the duty ratio D in the continuous working mode.
(b) Calculate currents at the transistor and the diode.
(c) Derive an expression for VO/VI in the discontinuous working mode.
(d) Draw the waveforms of voltages and currents at the transistor and the diode for

the continuous and the discontinuous mode.

(a) Magnetization is done from the primary side of the transformer and demag-
netization from the secondary side. A transformer with an air gap is used.
Also, there are vS = vP/n (always) and id = nit (only during the transition

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274 4 PWM DC/DC Converters

process), where id is the diode current and it is the transistor current. The
average current of the magnetization inductance is equal to 0, so the following
equations can be written (Fig. 4.46).

VIDTS ¼ nVoð1 À DÞTS ) VO ¼ D DÞ ) D ¼ 0:384:
VI nð1 À

Ii ¼ id ¼ Id1 þ Id0 ð1 À DÞ ¼ Vo ;
2 RL

Id1 þ Id0 ¼ 2Vo DÞ
RLð1 À

Id1 À Id0 ¼ Voð1 À DÞTSn2
Lm

(b) ) Id1 ¼ Vo þ n2Voð1 À DÞTS ¼ 1:9 A analogously
RLð1 À 2Lm
DÞ

Id0 ¼ Vo À n2Voð1 À DÞTS ¼ 1:346 A:
RLð1 À 2Lm
DÞ

It1 ¼ Vo DÞ þ VIDTS ¼ 0:725 A
nRLð1 À Lm

It0 ¼ Vo DÞ À VIDTS ¼ 0:357 A:
nRLð1 À Lm

(c) For the discontinuous mode the following equations can be written

VIDTS ¼ nVoD1TS ) Vo ¼ D
VI nD1

IO ¼ Vo ¼ Id0 1D1 ; D1 ¼ 2Vo ;
RL 2 RLId1

Id0 1 ¼ nIt01 ¼ n VIDTS
Lm

) D1 ¼ 2VoLm
nRLVIDTS

) Vo2 ¼ D2RLTS ;
VI2 2Lm

k ¼ 2Lm ) Vo ¼ pDffiffi ) Vo ¼ VpIDffiffi :
RLTS VI k k

(d) Fig. 4.46.

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4.5 Push–Pull (Symmetric) Converters 275

Fig. 4.46 Waveforms of it I t1 I
voltages and currents at I't1
transistor and diode in 0 t0
continuous and discontinuous id DTs
current mode for the converter Id1 Ts t
from Fig. 4.41 Id0 Id' 1
0 t
vt VI +nvo

vI

0 D1 t
-vd
t
0 -vO

-(vo+vI /n)
__ continuous mode,
- - - discontinuous mode

4.5 Push–Pull (Symmetric) Converters

This converter belongs to the group of symmetric converters because, compared to
the forward and flyback converters, it utilizes the magnetization curve of the
transformer in both quadrants. Practically, a symmetric converter (Fig. 4.47) con-
sists of two forward converters operating in push–pull, often called the counter-
cycle converters. One of the converters consists of transistor Tr1 and diode D1 and
the other of transistor Tr2 and diode D2, including, of course, the corresponding
transformer windings. One converter is active alternately to the other so that double
power is obtained at the output compared to the basic forward converter. Namely,
during one cycle of the control pulses the energy is transferred twice to the output
choke Lo via the transformer. The energy accumulated in Lo is transferred to the
load when both transistors are off, also twice within one cycle. Therefore, within
one cycle a push–pull converter performs twice the action of the forward converter.

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276 4 PWM DC/DC Converters

i C1 D1 iL L0
+ VL -
Tr1 iP i D1 + + +
V CE VP V0 C RL
I0
1 V0

iμ

iP

+ N1/2 N2/2
VI i D2

Tr2 iμ D2
i C2

Fig. 4.47 Basic circuit of a push–pull converter

The transistors are controlled in such a way that they must not be on simulta-
neously in order to avoid short-circuiting of the transformer. Therefore, the duty
cycle has to be

D ¼ s \0:5; ð4:178Þ
T

where τ is the interval of conduction of one of the transistors. For this reason the
duty cycle for a half-cycle is often defined:

d ¼ s ¼ 2D: ð4:179Þ
T =2

Since the transistors Tr1 and Tr2 must not be on simultaneously, the maximum
time of conduction is

smax ¼ T À toff ¼ T À ðts þ tf Þ; ð4:180Þ
2 2

where toff is the turn-off time, ts is the storage time, and tf is the falloff time of the
collector current. Therefore

d\ smax ¼ 1 À toff : ð4:181Þ
T =2 T =2

The difference

TDT ¼ T À s ð4:182Þ
2

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4.5 Push–Pull (Symmetric) Converters 277

is called the safety pause or the dead time and it denotes the interval when both
transistors are off. The minimum dead time is TDTmin = toff.

The favorable property of the push–pull converter compared to the forward
converter is that the transformer and the output filter are smaller, thus a higher
output power is possible with the same type of transistor. The shortcomings are:
there are more components in the basic circuit and the rectifier assemblies are more

complex.

4.5.1 Analysis of Idealized Circuit in Continuous Mode

The continuous mode implies a mode where the current through the output choke is
always greater than zero. In order to obtain the basic relations between voltages and
currents, the idealized circuit of a push–pull converter will be analyzed first. This
implies that:

• the transistors and the diodes are ideal switches (instantaneous switch-on and
switch-off, short circuit when on, open circuit when off),

• the conduction times of transistors are equal (τ1 = τ2),
• the Ohmic resistances of the transformer and the choke are negligible (zero),
• the stray magnetic flux is negligible, and
• the load current Io and the output voltage Vo are constant.

Figure 4.48 shows the waveforms of the characteristic voltages and currents in
the idealized circuit. Depending on the levels of transistor currents one cycle
consists of four different intervals.

4.5.1.1 I Interval

This interval starts at t = 0 and ends at t = t1. At the beginning of the interval (t = 0)
the transistor Tr1 is turned off so that both transistors are off. The equivalent circuit
during this interval is shown in Fig. 4.49a. The primary circuit is open. Since there

are no variations of the magnetic flux, the secondary voltage is zero.

Both diodes are on and they close the circuit for the current through the choke. If

the resistances of the diodes D1 and D2 are equal, each of them takes one half of the
choke current. The current Is which maintains the magnetic flux accomplished
previously by the magnetization current, Iμm, also flows through the diodes D1 and
D2. Until the primary circuit is open (the transistors are off) this current cannot flow.
Because only Tr1 was open previously, it follows that

NI ip ¼ À N2 Is À N2 Is þ N1 Ilm þ N2 IL À N2 iL : ð4:183Þ
2 2 2 2 2 2 2 2

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278 4 PWM DC/DC Converters

V BE1 I II III IV t4
0 t1 t2 t3 t
T/2
V BE2 (1- δ)T/2 δT/2 2VI T
t
V CE1 VI 2VI
V CE2 VI t

iμ iμm = VI δ t
4fL1 t
i μm
i C1 I LM /n
i μm t

I Lm /n

i C2

i D1 n i μm I Lm /2 t
I LM /2 2 I LM

i D2 I Lm t

VL VI - t
n
V0

- V0 t
- V0 V I /n - V0
i L L0 L0 I0
t
I LM
I Lm

Fig. 4.48 Current and voltage waveforms of the idealized circuit in the continuous operating
mode

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4.5 Push–Pull (Symmetric) Converters 279

(a) iD1 D1 i L L0 (b) iC1 iD1 D1 i L L0

N2 1 iL + VL - V0 Tr1 V CE1 L 1 L2 + VL - V0
2 2 C N1/ 2 N2 / 2 C

A iL VI

N2 1 iP iL
2 2 VS
iL iS
iD2 iD2
Tr2 VCE2 VP
iμ D2

D2

Fig. 4.49 Equivalent circuit in the I interval (a) and in the II interval (b) with the indicated
directions of the voltages and currents

Since ip = 0, the secondary equivalent of the magnetization current is determined
by

Is ¼ 1 nIlm; ð4:184Þ
2

where

n ¼ N1=2 :
N2=2

This current flows through the diode D1 in the reverse direction. This is possible
because one half of the choke current flows through D1 in the forward direction. In
order to have positive total current, one half of the minimum choke current has to be

ILm [ Is: ð4:185Þ
2

This is, at the same time, the condition of continuity.

Since the secondary voltage is zero and the voltages across diodes are negligible,
the voltage across the choke is VL = −Vo = const. The current through the choke is
thus linear and is represented by

iLðtÞ ¼ ILM À Vo t; 0 t t1; ð4:186Þ
L0

where ILM is the maximum current through the choke. The currents through the
diodes D1 and D2 are, thus, determined by:

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280 4 PWM DC/DC Converters

iD1 ¼ 1 iL À Is ¼ 1 ðILM À nIlm À Vo tÞ;
2 2 L0
ð4:187Þ
1 1 Vo
iD2 ¼ 2 iL þ Is ¼ 2 ðILM þ nIlm À L0 tÞ:

The collector–emitter voltages of the transistors are equal to the input voltage, i.e.,

VCE1 ¼ VCE2 ¼ VI: ð4:188Þ

4.5.1.2 II Interval

In the II interval (t1 < t < t2) the transistor Tr2 is on and Tr1 is off (VCE2 = 0, iC1 = 0).
The diode D1 is off and D2 is on (Fig. 4.49b). Since the secondary circuit containing
the diode D1 is open, then:

N1 ip ¼ N1 il þ N2 is; ð4:189Þ
2 2 2

Vo þ Vp À VCE2 ¼ 0:

From (4.189) one obtains

iC2 ¼ Àil þ iL and Vp ¼ ÀVo; ð4:190Þ
n

because VCE2 = 0, ip = −iC2, and is = −iL. Since the primary voltage is constant,
from Vp = L1diμ/dt it follows that the magnetization current is

il ¼ Ilm À VI ðt À t1Þ: ð4:191Þ
LI

The voltage across the choke is

VL ¼ ÀVs À Vo: ð4:192Þ

In additions, Vp/Vs = n, so

VL ¼ VI À Vo: ð4:193Þ
n

Because VL = const., the current through the choke is linear determined by

iL ¼ ILm þ VI À Vo ðt À t1Þ: ð4:194Þ
n L0

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4.5 Push–Pull (Symmetric) Converters 281

Since D1 is off (iD1 = 0), iD2 = i. The collector–emitter voltage of the noncon-
ducting transistor (Tr1) is

VCE1 ¼ VI À Vp ¼ 2VI; ð4:195Þ

and the collector current of the conducting transistor (Tr2)

iC2 ¼ ÀIlm þ VI ðt À t1Þ þ 1 VI À Vo ðt À t1Þ þ ! ð4:196Þ
L1 n n L0 ILm :

4.5.1.3 III Interval

In this interval both transistors are off again, but this time at the beginning of the
interval Tr2 switches from the conducting to the nonconducting state. The equiv-
alent circuit (Fig. 4.50) is the same as for interval I. The accumulated magnetic
energy in the choke Lo is now transferred to the load. By an analysis analogous of
the I interval, one obtains the following relations

Is ¼ n Ilm;
2

VL ¼ ÀVo; VCE1 ¼ VCE2 ¼ V1; ð4:197Þ

iLðtÞ ¼ ILM À Vo ðt À t2Þ:
L0

Now the secondary equivalent of the magnetization current flows through the
diode D2 in the reverse direction. The currents through D1 and D2 are

(a) iL L0 (b) iC1 iD1 D1 iL L0

iD1 D1 + iP
V0 Tr1 VCE1
1 iL + VL - i S VS + VL - V0
2 C VP iL C
- iμ
iL
- VI
iS Tr2 VCE2

1 iL +
2

iD2 D2 iD2 D2

Fig. 4.50 Equivalent circuit in the III interval (a) and in the IV interval (b)

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