Oversampled A/D Conversion

B. A. Wooley –1– HANDOUT #31
EE315

Spring 2002

Oversampled A/D Conversion

Basic concept:
Exchange resolution in time for that in amplitude through the
used of oversampling, feedback and digital filtering.

x(t) fS x(kT) Oversampling y(kT) Digital fN
Modulator Lowpass w(kMT)

Filter

fS = 1/T = sampling rate
fN = 1/MT = Nyquist rate
M = oversampling ratio

Oversampling Modulators

Predictive

• ∆ Modulation
• DPCM (Differential PCM)

Noise-Shaping

• Σ∆ Modulation
• Cascaded (Multistage) Σ∆ Modulation
• Multilevel Σ∆ Modulation
• Interpolation

B. A. Wooley –2– EE315
Spring 2002

Benefits of oversampling:

• Relaxed transition band requirements for analog
antialiasing (and reconstruction) filters

• Reduced baseband quantization noise power

Antialiasing

x(f) Input

Input must be band limited prior f
to sampling

fB

x˜ (f) Nyquist Sampling

fB fS 2fS f
f
fS = fS(minimum) = 2fB

Oversampling

x(f) Antialiasing
Filter

fB fs/2 fs
fS > 2fB

B. A. Wooley –3– EE315
Spring 2002

Baseband Noise

For an active discrete-time quantizer with step size ∆ and
sampling rate fS (which is not in overload), the quantization noise
power is distributed uniformly across the Nyquist bandwidth.

Ne (f)
NB

–fS / 2 –fB fB fS/2 f

The power spectral density of the quantization error, e, is

Ne(f) = -ef--S-2- =  1-∆---22-- f--1-S-


and all of the quantization noise is aliased into the Nyquist band,
–fS/2 to fS/2.

When fB = fS/2, then the baseband (–fB < f < fB) quantization noise
power is

∫SB0 = fB = -∆---2--
12
N e ( f ) df

–fB

B. A. Wooley –4– EE315
Spring 2002

When fB < fS/2, the baseband quantization noise power is

fB  -1∆---22--  f--1-S- fB
 
N e ( f ) df N e ( f ) df
∫ ∫SB = =

–fB –fB

= SB0  2--f--f-S-B-- = S---M--B---0-


where

M ≡ --f---S--- = OVERSAMPLING RATIO
2fB

2× increase in M ⇒ 3dB reduction in SB
⇒ 1/2 bit increase in resolution

A much greater improvement in resolution with increasing M can
be obtained by embedding the quantizer in a feedback loop.

FEEDBACK can be use for PREDICTION (∆ modulation) or NOISE
SHAPING (Σ∆ modulation)

In general, noise shaping modulators are more robust and easier
to implement than predictive modulators

B. A. Wooley –5– EE315
Spring 2002
Delta Modulation

Quantizer 1-bit
code
+ y
xΣ D/A ∫ v

–

q

∫ D/A

Integrator

MODULATOR DEMODULATOR

• Quantizes the difference between the input x, and the
quantization signal, q

• q is generated by accumulating the quantized differences

• Typically a 1-bit quantizer with a small step size; step size
can be adapted to accommodate “slope overload” (signal
changing too fast).

• Fundamental practical problem is the accumulation of D/A
mismatch error in the demodulator

B. A. Wooley –6– EE315
Spring 2002

Noise Shaping Modulators

• Sample and coarsely quantize the input at a rate well above
the Nyquist rate

• Shape the spectrum of the quantization noise so as to push
most of its energy outside the signal baseband

• Out-of-band noise, including quantization noise, is
suppressed by a subsequent digital lowpass filter
(DECIMATION FILTER)

• Output of the digital filter can be resampled at a lower
sampling rate if the filter provides adequate antialiasing, as
well as noise suppression

Σ∆ Modulation

Simplest noise-shaping modulator is a first-order Σ∆ (or ∆Σ)
modulator with 1-bit quantization

Integrator Quantizer

x(kT) + u(kT) w(kT) y(kT) v(kT)
D/A
–∫
1-bit
– code

q(kT)

D/A

Modulator Demodulator

B. A. Wooley –7– EE315
Spring 2002

• Integrator accumulates the difference between the input,
x(kT), and the quantization signal, q(kT)

• Feedback keeps the integrator output, w(kT), near zero, thus
minimizing the low-frequency difference between x and q

• For 1-bit quantization:

– No D/A nonlinearity

– Quantizer just a comparator

– 2-level D/A converter can be an analog switch network
toggling between + and – full scale

Modulator Input, Quantizer Output 0.6 Σ∆ Modulator Response
0.4
0.2 50 100 150 200 250

0 Time (t/T)
-0.2
-0.4
-0.6

0

B. A. Wooley –8– EE315
Spring 2002
Linearized Discrete-Time Model:
Y(z)
E(z)

+ A(z) +
X(z) –

–

where A(z) = -1----z–---–--z-1--–---1-

In this representation of a “first-order” Σ∆ modulator, the
quantization error is modeled as an additive error sequence, e(kT),
with the z-transform E(z).

It is not strictly valid to assume the error sequence is random and
uncorrelated with the input, especially when a 2-level quantizer is
used. For a 2-level quantizer, the quantization error is highly
correlated with the modulator input. Nonetheless, the model does
illustrate the shaping of the quantization noise spectrum. It does
not account for the appearance of strong discrete noise tones in
that spectrum.

A(z) as specified above is simply a delaying discrete-time integrator
that can be implemented as:

Delay

+ z–1

B. A. Wooley –9– EE315
Spring 2002

From the above model it follows that

Y(z) = A(z)[X(z) – Y(z)] + E(z)

∴ Y(z) = 1-----+A-----(A--z---(-)-z----) X(z) + -1----+-----1A-----(--z----) E(z)

1 + A(z) = 1 + -1----z–---–--z-1--–---1- = -1----–---1--z---–---1-

1-----+A-----(A--z---(-)-z----) =  1-----z–---–--z-1--–---1- (1 – z–1) = z–1



∴ Y(z) = z–1X(z) + HE(z)E(z)

where

HE(z) = 1 – z–1 (first-order difference)

Thus, in the output Y(z), the quantization error is filtered by the first-
order difference HE(z)

In the frequency domain

HE(jω) = (1 – e–jωT) = 2e–j ω T ⁄ 2  e----j--ω---T----⁄--2----–-2----e---–---j--ω---T----⁄--2-


= 2e–jωT ⁄ 2[j sin (ωT ⁄ 2)]

= (2e–jωT ⁄ 2)(e–jπ ⁄ 2)[ sin (ωT ⁄ 2)]

= [2 sin (ωT ⁄ 2)]e–j(ωT – π) ⁄ 2
where

T = 1/fS

B. A. Wooley – 10 – EE315
Spring 2002

Thus,

HE(f) = 2 sin  ω---2--T-- = 2 sin  2----π--2--f--T--
 

= 2 sin (πfT) = 2 sin (πf ⁄ fS)

If Ne(f) is the power spectral density of the quantization error e(kT),
the spectral power density of the quantization noise in the

modulator output is:

Ny(f) = HE(f) 2Ne(f)

Noise Shaping

Noise Shaping Function Ideal Digital
Lowpass Filter

First-Order Noise Shaping

fB fN fS/2

Frequency

B. A. Wooley – 11 – EE315
Spring 2002

If it is assumed that the spectrum of the quantization error is white,

which is not actually the case, and if SQ denotes the quantization
error power,

SQ ≡ e2 = 1-∆---22--

then

Ne(f) = -S-f--S-Q-- =  1-∆---22-- -f-1-S-


and the baseband quantization noise power in the modulator output
is

fB fB

∫ ∫SB = NY(f)df = HE(f) 2Ne(f)df

–fB –fB

∫= -S-f--S-Q-- fB [2 sin (πfT)]2df
–fB

If f << fS = 1/T, then

sin (πfT) ≅ πfT = π(f ⁄ fS)

and

-S-f--S-Q-- fB 2 π2 -S-f--3S-Q-- -f3--3- fB
 –fB
≅∫SB4  π  -f-f-S- df = 4
 

–fB

= 4π2  -S-f--3S-Q--  -2--3-f--B3-- = -π-3--2-  2--f--f-S-B-- 3
  
  SQ

B. A. Wooley – 12 – EE315
Spring 2002

∴ ≅ -π-3--2-  -M1--- 3 -π-3--2-  -M1--- 3  1-∆---22--
  
SB SQ =

Since a full-scale sinusoid has an amplitude of at most ∆/2, the
maximum dynamic range of the modulator is

DR = 10log (---∆-----⁄---2---)---2----⁄--2--
SB

= 10log -π---3----2-------∆-M-1------2----⁄3---8----1∆------2-2------ = 10log 2----9π----2-M3

= 10log -2---9π----2- + 30log (M)

Each 2× increase in M results in a 9dB in dynamic range, which
corresponds to 1.5 bits of resolution

Because of the spectral tones that result from the correlation of the
quantization error with the input, the dynamic range of a first-order
Σ∆ modulator with 1-bit quantization is not as large as this result
indicates

B. A. Wooley – 13 – EE315
Spring 2002
Error Compensation Model of a Σ∆ Modulator
yn
+ Quantizer
xn
εn

+

qn +

DELAY

Predictor

Configuration of original patent on Σ∆ modulation (Cutler, U.S.
Patent 2,927,962, 3/8/60); referred to as a transmitting terminal
using error compensation

yn = xn – qn + εn
qn = εn – 1
∴ yn = xn + εn – εn – 1
Y(z) = X(z) + (1 – z–1)E(z)
Thus, this topology provides first-order noise shaping. However,
it is difficult to implement.
The error compensation topology can be rearranged as follows
to obtain the conventional first-order Σ∆ modulator.

B. A. Wooley – 14 – EE315
Spring 2002
First, the delay is moved in to the forward path:
yn
+ DELAY εn
xn +

qn +

This configuration implements the noise-differencing
relationship with a delay of the input:

yn = xn – 1 + εn – εn – 1

Y(z) = z–1X(z) + (1 – z–1)E(z)

Next, simply rearrange the paths at the input and output of the
quantizer to obtain the conventional first-order Σ∆ modulator

+ Integrator Quantizer yn
xn + DELAY εn

+

qn

B. A. Wooley – 15 – EE315
Spring 2002

Oversampling A/D Conversion

Combine an oversampling noise-shaping modulator with a low-
pass digital filter that removes the out-of-band quantization noise.
The digital filter also provides the antialiasing need to allow
resampling at a lower sampling rate (“decimation”).

fs fs /M

ANALOG OVERSAMPLING DECIMATION DIGITAL
IN MODULATOR FILTER OUT

fs = Sampling Rate
M = Oversampling Ratio

Higher-Order Σ∆ Modulators

• Single quantizer
Multi-loop noise differencing
Single-loop with multi-order filter

• Cascaded (multistage)

B. A. Wooley – 16 – EE315
Spring 2002
Single-Quantizer Modulator

+ A(z) E(z) Y(z)
X(z) – +

–

F(z)

Y(z) = HX(z)X(z) + HE(z)E(z)
HX(z) = 1-----+-----A-A----(-(-z--z--)-)-F----(---z---)
HE(z) = 1-----+-----A-----(-1-z----)--F----(---z---)
A(z) = H-H----XE----((--zz----))
F(z) = -1----H–-----XH---(-E--z--(-)-z----)

B. A. Wooley – 17 – EE315
Spring 2002

Noise Differencing Modulators

Class of modulators for which

Y(z) = z–nX(z) + (1 – z–1 L ( z)

)E

That is

HX(z) = z–n and HE(z) = ( 1 – z–1 L

)

Noise differencing modulators can be implemented with a single
quantizer and L nested loops. However, limit cycle instability
occurs for L > 2.

For an Lth order noise differencing modulator
HE(z) = (1 – z–1)L

HE(f) = 2 sin (πf ⁄ fS) L

The quantization noise is thus shaped as
Ny(f) = HE(f) 2Ne(f) = [2 sin (πf ⁄ fS)]2LNe(f)

Noise Shaping Function, |H (f)| Ideal Digital L=3
Lowpass Filter L=2
E
L=1
fS/2
fB fN

Frequency

B. A. Wooley – 18 – EE315
Spring 2002

Baseband Quantization Noise

As in the case of the first-order modulator, if it is assumed that

the quantization noise is white with a uniform spectral density

SQ/fS, then the quantization noise remaining in the baseband of
the output is

fB fB

∫ ∫SB = NY(f)df = HE(f) 2Ne(f)df

–fB –fB

∫= -S-f--S-Q-- fB [2 sin (πfT)]2Ldf
–fB

If f << fS = 1/T, then

sin (πfT) ≅ πfT = π(f ⁄ fS)

and

22L-S-f--S-Q-- fB  -f-f-S- 2L 22 Lπ2 L -f--S2-S--L---Q-+----1- -2f--2-L--L---+-+----11-- fB
  –fB
–fB df
=∫SB π =

22L π2L  -f--2S-S--L---Q-+----1-  -2-2--f-L-2B---L-+---+--1--1-  2----Lπ----2-+--L---1--  -2-f--f-S-B-- 2L + 1
   
=   = SQ

 -2---Lπ----2-+--L---1--  M-1--- 2L + 1
 
= SQ

Thus, for an Lth order modulator, every doubling of M results in
an increase in dynamic range of 6L+3 dB (L+0.5 bits)

B. A. Wooley – 19 – EE315
Spring 2002

120 L=3 20
100 L=2 16
12
80 L=1 8
60 4
40 8 16 32 64 128 256 512
20
Oversampling Ratio, M
Dynamic Range (dB)0
Resolution (Bits)0

4

Noise differencing modulators can be implemented with a single
quantizer and L nested loops. However, limit cycle instability
occurs for L > 2. Thus, we consider the case where a single
quantizer is used with L = 1 and L = 2:

For HX(z) = 1 A(z) = 1-----z–---–--z-1--–---1-
L = 1: HE(z) = (1– z–1) ⇒

F(z) = 1

L = 2: HE(z) = (1– z–1)2 ⇒ A(z) = -(--1-----–-z---–z---1-–--1---)--2-

F(z) = 2 – z–1 ≠ 1

B. A. Wooley – 20 – EE315
Spring 2002

A canonical realization of a 2nd-order noise-differencing modulator
is thus:

A(z) E

X + + + z –1 +Y

–

–

z –1

F(z)

+

+ z –1

––

which can be rearranged as

X + + + + z –1 E Y

– – +

– –

z –1

z –1 z –1

+ –

–+

B. A. Wooley – 21 – EE315
Spring 2002
The above topology reduces to
E
X + + + + z –1
+Y
– –

– –

z –1

Thus, the classical topology for a 2nd-order Σ∆ modulator is

INTEGRATOR 1 INTEGRATOR 2 QUANTIZER
A/D
+ + + + DELAY
Σ Σ Σ Σ
y (nT)
x(nT) – + – +

DELAY

q(nT) D/A

Y(z) = z–1 X(z) + (1 – z–1)2 E(z)

The first integrator in this configuration is nondelaying. Such an
integrator can be realized using a delaying integrator identical to
that used in the second stage with the following configuration.

B. A. Wooley – 22 – EE315
Spring 2002

INTEGRATOR 1 + INTEGRATOR 2 QUANTIZER
A/D
+ + DELAY +Σ + + DELAY
Σ Σ Σ Σ

x(nT) – + – + y (nT)

D/A

q(nT)

which can be rearranged as:

INTEGRATOR 1 INTEGRATOR 2 QUANTIZER
A/D
+ + DELAY + + DELAY
Σ Σ Σ Σ

x(nT) – – + y (nT)

2

D/A

q(nT)

To eliminate the multiply by 2:

INTEGRATOR 1 INTEGRATOR 2 QUANTIZER
A/D
+ 1 + DELAY + + DELAY
Σ 2 Σ Σ 2Σ
y (nT)
x(nT) – + – +

D/A

q(nT)

B. A. Wooley – 23 – EE315
Spring 2002

The gain of 2 preceding the second integrator stage results in the
need for a large dynamic range at the output of this stage, in turn
requiring a signal swing at the input that is well below the supply
voltage.

However, if a 2-level quantizer is used, then the “gain” preceding the
second stage can be adjusted arbitrarily. In that case, the second
stage can be implemented using the same topology as the first
stage.

Second-Order Σ∆ Modulator (w/ 2-level quantizer)

INTEGRATOR 1 INTEGRATOR 2 QUANTIZER
A/D
+ 1 + DELAY + 1 + DELAY
Σ 2 Σ Σ 2 Σ

x(nT) – + – + y (nT)

D/A

q(nT)

Integrator Dynamic Range

Traditional Modulator
Modified Modulator

Density
Density

-1 -0.5 0 0.5 1 -2 -1 0 1 2

Integrator 1 Output/∆ Integrator 2 Output/∆

B. A. Wooley – 24 – EE315
Spring 2002
Integrator Gain
y(kT)
Integrator model:

Gain Clipping Delay
z–1
x(kT) go +

Po

Leak

Sensitivity of baseband noise to integrator gain:

5

Relative Baseband Error (dB) 4

Input Power = – 40 dB
3

2

1

0

-1

-2 0.4 0.5 0.6 0.7 0.8
0.3
Integrator Gain, g0

B. A. Wooley – 25 – EE315
Spring 2002

Integrator leak

Integrator “leak” refers to the finite dc gain of a practical integrator

H (z) = z -1 + DELAY
1 –P z -1 Σ P0
0
+

AMPLITUDE (dB)H0

⇔

Relative Baseband Error (dB) LOG FREQUENCY

5 2
Simulation (Input Power = –20 dB)

4
Analytical Result

3

2

1

0

-1
0 0.5 1 1.5

M/H0

B. A. Wooley – 26 – EE315
Spring 2002
Integrator Linearity
v(kT)
u(kT) Ideal Integrator
+ DELAY

v(kT + T) = u(kT) + v(kT)

with nonlinearity
v(kT + T) = u(kT) + α1[u(kT)]2 + α2[u(kT)]3 + . . .
+ v(kT) + β1[v(kT)]2 + β2[v(kT)]3 + . . .

TSNR (dB) 105

100 σ1 = β1 = 0.01, 0.02, 0.05, 0.1% -5 0

95

90

85

80
Ideal Modulator
Simulation

75 Analytical Result

70
-30 -25 -20 -15 -10

Input Level (dB)

B. A. Wooley – 27 – EE315
Spring 2002

TSNR [dB] 105 σ2 = β2 = 0.05, 0.2, 1.0%
100
-5 0
95

90

85

80 Ideal Modulator
Simulation

75 Analytical Result

70
-30 -25 -20 -15 -10

Input Level [dB]

B. A. Wooley – 28 – EE315
Spring 2002
Integrator Slewing
C2
u(kT) DELAY v(kT) u(kT) -v(kT)
C1

STEP RESPONSE STEP RESPONSE

v(kT) v(kT)

kT kT

Integrator Slewing

Relative Baseband Error (dB) 35 Noise Input Power = – 5 dB
30 0.95 Noise + Distortion
25
20 1 1.05 1.1 1.15 1.2
15
10 Slew Rate (∆/T)

5
0
-5

0.9

B. A. Wooley – 29 – EE315
Spring 2002
Comparator Hysteresis
v
u 1-bit A/D
u
v

Hysteresis, h∆

Relative Baseband Error (dB) 20 Simulation (Input Power = –20 dB)
15 Analytical Result
10 100
10-1
5
0 Hysteresis, h
-5

10-2

B. A. Wooley – 30 – EE315
Spring 2002

Analog Integration

Two basic circuit approaches to realizing analog integrators in a
CMOS technology are CONTINUOUS TIME and SAMPLED-DATA

Continuous Time Integration
• gm-C
• MOSFET-C

Sampled-Data Integration
• Switched-Current
• Switched-Capacitor

Continuous-Time Integrators

Vtune CI Vi Vtune Vo
Vi MR Vo − gm CI
−
+
A

+

MOSFET - C gm - C

Limitations

• Integrator output is sensitive to timing jitter
• Sensitive to waveform asymmetry

e.g. response to ...011000... differs from
response to ...010100...

• Waveform asymmetry can enhance spurious noise tones
• Frequency response of loop governed by capacitors and

MOS transconductance or resistance
• Poor linearity

B. A. Wooley – 31 – EE315
Spring 2002

Switched-Current Integrator

VDD 2I kI
Iin
Φ1 Φ1 Φ2 Iout
M3 = k × M2
M1 M2

Cgs1 Cgs2 Cgs3

-I-Io--i-u-n--t = -1--k--–--z---z–---1–--1-

Limitations

• Current sources must be cascode to reduce output
conductance ==> high supply voltage

• Large Vgs – VT needed to reduce sensitivity to VT
mismatch ==> high power dissipation

• Sensitive to switch parasitics and charge injection

B. A. Wooley – 32 – EE315
Spring 2002
Switched-Capacitor Integrator
Vout
Φ1 CS Φ2 CI
Vin
−
Φ2 Φ1 +

V--V---o-i--un---t = -C----S-  -1----z–---–--z-1--–--1- 
CI 


Fully-differential switched-C integrator

Φ1 CS Φ2 CI +

+ Φ1 +− Vcmo
Vcmi −+ Vout
Φ2
Φ1 CI −
Vin Vcm,in
CS Φ2
Φ2

−

Φ1

• Common-mode input and output levels can be
set independently

B. A. Wooley – 33 – EE315
Spring 2002

CMOS Implementation of a 2nd-Order Σ∆ Modulator

Vref+
Vref–
Vref+
Vref–

1 C 1 4 UT
C
N 1 C

1 C

Vref+
Vref–
Vref+
Vref–

Timing Diagram t

1 t

hase 1 t

Phase 2 t

B. A. Wooley – 34 – EE315
Spring 2002
Phase 1
OUT
S1 S3 • Sample inputs C2
IN C1 S4 • Compare outputs C2 OUT
C1 S4
S1 C2
S3 S3

S1 C1 S4

S1 C1 S4
S3

C2

S1 S3 • S3 opens before S1 C2
IN C1 S4 C2
C2
S1 C1 S4 S3
S3
S1 C1 S4

S1 C1 S4
S3

C2

B. A. Wooley – 35 – EE315
Spring 2002
Phase 2 • Enable feedback
• Integrate UT
• Reset comparator
UT
Vref+
Vref–
Vref+
Vref–

S C S C
C S C
C4 S

S2

Vref+ Vref+
Vref– Vref–

V ref+ S4 opens before S2V ref+
V ref– V ref–
2

S2 2

Vref+
Vref–
Vref+
Vref–

B. A. Wooley – 36 – EE315
Spring 2002

Operational Amplifier Requirements

• Linear settling ⇒ high slew rate
• High speed ⇒ single-stage amplifier
• Low distortion ⇒ gain > 60dB
• Wide dynamic range ⇒ low noise and large output swing
• Differential architecture

Class AB Op Amp

VDD

MC1 Bias 1 Bias 2 MC2
VOUT+ VIN+ VIN – VOUT–

MC3 Bias 3 I1 I2 Bias 4 MC4
I bias I bias

B. A. Wooley – 37 – EE315
Spring 2002

Common-mode biasing:

VD

φφ φ φ2

3 1 Mbias1 Mbias1 2 C4

MPLIFIER CORE B2

φ φ φ φ2

MO 5 OUT+ UT–
7 Mbias2
MO
φ φ
Mbias2 6 C8

φ φ2

Comparator

+

M9 M3 M4 M10

OUT
OUT

M5 M6

φ

VI1 M1 M2 M8
M7

–

VI2

B. A. Wooley – 38 – EE315
Spring 2002

Summary of Measured Performance

Dynamic Range 98 dB (16 bits)
Peak SNDR 94 dB (0.002% THD)
Nyquist rate 50 kHz
Sampling rate 12.8 MHz
Oversampling Ratio 256
Differential input range 4V
Supply voltage 5V
Supply rejection 60 dB
Power dissipation 13.8 mW
Active Area 0.39 mm2
Technology 1-µm CMOS

Measured SNDR

SNDR (dB) 100

90 Signal Freq. = 2.8 kHz 0
Clock Freq. = 12.8 MHz

80 M = 256
70 0 dB = 4Vp-p

60

50

40

30

20

10

0
-100 -90 -80 -70 -60 -50 -40 -30 -20 -10

Input Level (dB)

B. A. Wooley – 39 – EE315
Spring 2002

Baseband Spectrum

0

Power Spectral Density (dB) -20
-40 –5 dB, 2.8 kHz Input

-60

-80

-100 Measured
-120

-140

-160 Ideal

-180
0 2 4 6 8 10 12 14 16 18 20 22 24

Frequency (kHz)

Subcircuit Performance

Operational Amplifier 67 dB
DC gain 50 MHz
Unity-gain frequency 350 V/µsec
Slew rate 6V
Linear output range 12.8 MHz
Sampling rate

Integrator 7.25 nsec
Settling time constant

Comparator 13 mV
Offset

B. A. Wooley – 40 – EE315
Spring 2002
2.5 Integrator Step Response
2
Differential Output Voltage (V) Measured
1.5 Simulated
1
10 20 30 40 50
0.5
0 Time (nS)

-0.5
0

Attributes of 2nd-order Σ∆ modulator:

• Simple architecture
• Very tolerant of component mismatch
• Stable operation
• High linearity
• Small area, low power

B. A. Wooley – 41 – EE315
Spring 2002

Quantization Noise Spectra of Σ∆ Modulators

Owing to the correlation of the quantization error with the input in
oversampling modulator employing a single quantizer, discrete
noise peaks (tones) appear in the output spectrum for certain
inputs.

The following simple example illustrates the origin of the noise
tones:

• x(kT) = 0 (Midrange Input)

(kT): • • •

⇒ No Low Frequency Component

• x(kT) = (0.001) ∆/2 •••

(kT): 000 T

⇒ Frequency Component in Baseband

B. A. Wooley – 42 – EE315
Spring 2002

For a single-quantizer modulator, the quantizer error is defined as
the difference between the analog input and output of the quantizer:

+ u(kT) QUANTIZER
Σ A/D
x(kT) FILTER y(kT)
–

D/A

q(kT)

e(kT) = q(kT) – u(kT)

System analysis (R. Gray, “Spectral Analysis of Sigma-Delta
Quantization Noise) of an ideal first-order Σ∆ modulator indicates
that the spectrum of the quantizer noise is not white. For a dc input,
xdc, the spectrum consists solely of impulses with power

Se(k) = -(--2---∆-π---k2----)--2-

at frequencies

fk = 〈 k  -x--∆-d---c- + -12- 〉 fS


where k is a nonzero integer and 〈 w〉 represents the fractional part
of w.

The strongest tones occur for small values of k because of the
reciprocal dependence in the expression for Se(k).

The power in the quantization noise tone in the output of the
modulator that corresponds to Se(k) is

Sy(k) = -∆---2---[---s----i(-n-π---(-k--π--)--f2--k---T----)--]--2--

B. A. Wooley – 43 – EE315
Spring 2002

Quantization noise spectrum for a first-order modulator:

Frequency fk/fs 0.5

0.4 0.1 0.2 0.3 0.4 0.5
0.3

0.2
0.1

0
0

MSE (dB) -12
-14
-16 0.1 0.2 0.3 0.4 0.5
-18
-20 DC Input Level x/∆
-22
-24
-26

0

Discrete tone in a 2nd-order modulator spectrum:

0
-20
Power Spectral Density (dB)
-40
-60

-80
-100

-120

-140
0 2 4 6 8 10 12 14 16 18 20 22 24

Frequency (kHz)

B. A. Wooley – 44 – EE315
Spring 2002

Quantization noise spectra for M = 256:

-50 First-Order Σ∆ Modulator
-60
Maximum Peak (dB) -70 k: 2 53 45 1
-80 Second-Order Σ∆ Modulator
-90
-100
-110
-120

-80

-90

-100

-110

-120 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
-0.05
DC Input Level (∆)

Noise spectrum of 2nd-order modulator:

-80 Simulated
-90
Maximum Peak (dB) -100
-110
-120

-80

-90 Measured
-100

-110

-120

-0.05 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

DC Input (∆)

-3 dB Input

B. A. Wooley – 45 – EE315
Spring 2002

Tones near midrange in 2nd-order modulator:

Maximum Noise Peak (dB) -90 Measured -0.004 0 0.004 0.008 0.012 0.016
-95 0.008 0.012 0.016
-100 -0.012 -0.008 -0.004 0 0.004
-105 Simulated
-110 DC Input (∆)
-115 -0.012 -0.008
-120

-0.016
-90
-95
-100
-105
-110
-115
-120

-0.016

Worst tone a 2nd-order modulator:

Power Spectral Density (dB) -90 Measured 10 15 20 25
-100 20 25
-110 5 10 15
-120 Simulated
-130 Frequency (kHz)
-140 5

0
-90
-100
-110
-120
-130
-140

0

B. A. Wooley – 46 – EE315
Spring 2002

Composite spectra for several DC inputs:

-90

Power Spectral Density (dB) -100

-110

-120

-130

-140 5 10 15 20 25
0
Frequency (kHz)

Worst-tones as a function of oversampling ratio:

Worst-Case Tone (dB) -20 ED ED
-30
-40 ED DE 1st-order Σ∆ EI
-50 512
-60 ED
-70 EI DE
-80
-90 EI
-100
-110 EI 2nd-order Σ∆
-120
E Simulated EI
8 D Equation (5.4) EI
I Measured

16 32 64 128 256 1024

Oversampling Ratio

B. A. Wooley – 47 – EE315
Spring 2002

Spectra for a sinusoidal input:

Power Spectral Density (dB) 0
-20

-40 Second-Order Noise Shaping 50
-60
10 20 30 40
-80
-100 Frequency (kHz)

-120
-140

0

Spectral tones in a single-quantizer, 4th-order Σ∆ modulator:

-80

-100

Spectral Power (dB) -120

-140

-160

-180

-200 5 10 15 20 25
0
Frequency (kHz)

B. A. Wooley – 48 – EE315
Spring 2002

Approaches to “whitening” the error spectrum

• Cascaded sigma-delta modulation
• Multibit quantizers
• Dither

Simulation Requirements

The design of oversampling data converters requires a
behavioral simulation capability because of the need to simulate
long data traces.

The results presented here were obtained using the program
MIDAS, a functional simulator for mixed digital and analog
sampled data systems.

MIDAS

• System described by netlist
• Simulate in discrete time
• Includes tools for performance analyses such as spectral

analysis, distortion and statistical functions
• Flexible I/O, including interface to test environment
• Written in C++
• User extensible with C-like code
• Not an “expert” tool for novice designers; intended for use

by designers who understand what models should be used
or constructed