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2 Published by: POLITEKNIK MERLIMAU MELAKA Politeknik Merlimau Karung Berkunci 1031, Pejabat Pos Merlimau, 77300 Merlimau Melaka. COPYRIGHT@ 2022, Politeknik Merlimau Melaka This work is subject to copyright. All rightsreserved. No part of this publication may be reproduced, stored in a retrievalsystem, or translated, in any form or by any means, electronics, mechanical, photocopying, recording or otherwise, without the prior written permission from publisher. The program listings (if any) may be entered, stored and executed in a computer system, but they may not be reproduced for publication. Perpustakaan Negara Malaysia Cataloguing-in-Publication Data Rahmah Khamis, 1981- 555 TIMER APPLICATION CIRCUIT : ASTABLE AND MONOSTABLE MODE : CIRCUIT THEORY AND EXERCISE / RAHMAH BINTI KHAMIS, MAISARAH BINTI MAHIZAN, SURAYAHANI BINTI MD SAHARI. Mode of access: Internet eISBN 978-967-2065-91-3 1. Electric circuits. 2. Government publications--Malaysia. 3. Electronic books. I. Maisarah Mahizan, 1985-. II. Surayahani Md Sahari, 1977-. III. Title.621.3192 Printed and Published in Malaysia by: POLITEKNIK MERLIMAU MELAKA Politeknik Merlimau Karung Berkunci 1031, Pejabat Pos Merlimau, 77300 Merlimau Melaka Tel : 06-2636687 Fax : 06-2636678 Email : webmaster[@]pmm.edu.my Module eBook Development Chief Editor & Authors : Mohammad NoorSyauqi Bin Zairul Proof-Reader : Siti Noraini binti Hamzah
3 Preface This eBook is contains three main topics. Topic 1 is intended to provide the basic introduction and applications of the 555 timer. Topic 2 provides the schematic circuits, waveforms, operation and the formula for the 555 Timer in Monostable Mode. It also states the effect of varying values of components to the output of timer. Topic 3 provides the schematic circuits, waveforms, operation and the formula for the 555 Timer in Astable Mode. It also states the method to generate a duty cycle of less/more than 50%. All topics also contains examples and exercises for selfassessment.
4 TABLE OF CONTENTS TOPIC 1: INTRODUCTION TO 555 TIMER Overview What is 555 Timer? Internal circuitry of 555 Timer What inside in 555 Timer? Pin configuration Pin Assignment Application of 555 Timer 5 7 8 9 11 12 14 TOPIC 2: MONOSTABLE MODE Schematic circuit Output waveform Circuit operations Effect of varying the values of components. 15 16 17 18 TOPIC 3: ASTABLE MODE Introduction to Astable Mode Schematic circuit Output waveform Formula for generating delay time 19 20 21 22 Refferences 23
5 CHAPTER 1 ; INTRODUCTION TO 555 TIMER overview The 555 timer, is an extremely popular IC for timing-related applications. They are robust and versatile, as they can be used in any circuit which requires some sort of time control. It can be used to generate various types of pulses, to create time delays, and also for Pulse Width Modulation (PWM). The most common use of 555 timers is to generate clock signals for circuits.
Figure 1.1: 555 Monostable Printed Circuit Board (PCB) Hans Camenzind created the 555 Timer in 1971, and it may be used in a wide variety of electronic equipment, including toys, kitchen appliances, and even spacecraft. It is an extremely stable integrated circuit that can generate precise oscillations and time delays. The 555 Timer can operate in a variety of ways, including Schmitt trigger, bistable, monostable, and astable. 6
WHAT IS 555 TIMER? Figure 1.2: 555 timer integrated circuit (IC) IC 555 is named after the three 5kΩ resistance that act as the voltage divider inside the IC circuitry. 7
INTERNAL CIRCUITRY OF 555 TIMER Figure 1.3: Internal Circuitry of 555 timer It consists of voltage divider circuit, two comparators, a flip flop,a discharge transistor, and an output circuit. 8
9 WHAT'S IN A 555 TIMER? Voltage divider; The voltage divider is made using three 5k resistors. The voltages across these resistors are given as reference voltages to the 1 comparators. Comparator; Upper comparator: The inputs to the upper comparator or the threshold comparator are the threshold pin connected to the non-inverting input (+), and a reference voltage of 2/3 Vcc is connected to the inverting input (-) of the comparator. Lower comparator: For the lower comparator or the trigger comparator, 1/3 Vcc reference voltage is given to the non-inverting input (+) and the trigger pin is connected to the inverting input (-) of the comparator.
10 Flip-flop; The outputs of the comparators are given as inputs to a flip flop. An SR flip-flop is a memory element that can store and output a logic “0” or logic “1” depending on the two inputs SET 3 and RESET or S and R, respectively. S R Q Q’ 0 0 Memory Memory 1 0 1 0 0 1 0 1 1 1 Invalid Invalid
PIN CONFIGURATION Figure 1.3: Pin configuration of 555 timer The figure above shows pinouts of the 555 timers. 555 ICs generally come in an 8-pin DIP package. Note: To identify which pin is on top of an integrated circuit, there is typically a little notch in the packaging. The IC numbers are then counted counter clockwise, beginning with the upper-left pin 11
12 PIN ASSIGNMENTS PIN 1; Ground Connects to the 0V power supply. PIN 2; Trigger The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. When < 1/3 Vcc ('active low') this makes the output high (+Vcc). This pin is an inverting input to a comporator 2 that is responsible for transition of flip-flop from set to reset. PIN 3; Output Output of the timer. PIN 4; Reset To disable or reset the timer, a negative pulse is applied to this pin. When this pin is not to be used for reset purpose, it should be connected to + Vcc to avoid any possibility of false triggering. PIN 5; Control Voltage The function of this terminal is to control the threshold and trigger levels which is set internally to be 2/3 Vcc. When this pin is not used, it should be connected to ground through a 0.01 μF to eliminate electrical noise. It can be left unconnected if noise is not a problem.
13 PIN 6; Treshold •This is the non-inverting input terminal of comparator 1, which compares the voltage applied to the terminal with a reference voltage of 2/3 Vcc. •The amplitude of voltage applied to this terminal is responsible for the set state of flipflop. •When > 2/3 Vcc ('active high') this makes the output low (0V)* only if pin 2 is HIGH. PIN 7; Discharge Pin 7 is not an input.It is called discharge terminal because when transistor Q1 ON, capacitor discharges through the transistor Q1.When the transistor Q1 is OFF, the capacitor charges at a rate determined by the external resistor and capacitor. PIN 8; Supply A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground .
14 APPLICATION OF TIMERS The 555 timer IC is an integrated circuit (chip). The part is still in widely used, easy to use, affordable and has good stability. Precision timing Oscillator (Pulse generation) Sequential timing Time delay generation Pulse width modulation (PWM) signals Pulse position modulation Linear ramp generator Accurate clock signals
Chapter 2 ; MONOSTABLE MODE A BRIEF INTRODUCTION OF THE TIMER CIRCUIT MONOSTABLE MODE TIMER CIRCUIT Monostable multivibrator (MMV) mode of 555 timer IC is also called Single shot mode. Only one state, as the names indicate, is stable, and the other is known as an unstable or quasi-stable condition. 555 timer IC remains in stable state until the external triggering is applied. Schematic Circuit Figure 2.1 : Schematic circuit of Monostable Mode 15
OUTPUT WAVEFORM Figure 2.2 : Output waveforms of Monostable Mode 16
17 CIRCUIT OPERATIONS Monostable mode has a stable state at LOW. 1. Initially, when the output at pin 3 is low, the discharge transistor Q1 is ON and capacitor, C is shorted to ground. 2. When a negative pulse is applied to pin 2, the trigger input falls below 1/3Vcc, the output of comparator 2 goes high which resets the flip-flop and the transistor Q1 turns OFF and the output at pin 3 goes high. 3. This is the transition of the output from a stable to an unstable state. As the discharge transistor Q1 is OFF, the capacitor C begins charging toward Vcc through resistance R. 4. When a negative pulse is applied to pin 2, the trigger input falls below 1/3Vcc, the output of comparator 2 goes high which resets the flip-flop and the transistor Q1 turns OFF and the output at pin 3 goes high. 5. Thus the output returns back to a stable state from unstable state. The output of the Monostable Multivibrator remains low until a trigger pulse is again applied. 6. The capacitor C has to charge through resistance R. The larger the time constant RC, the longer it takes for the capacitor voltage to reach 2/3 Vcc. 7. The time during which the timer output remains high, Tw: Tw ≈ 1.1 RC 1. The time constant of Monostable Multivibrators can be changed by varying the values of the capacitor, C the resistor, R or both. 2. Generally used to increase the width of a pulse or to produce a time delay
EFFECT OF VARYING VALUE OF COMPONENTS Figure 2.3 : Different values of the time constant affect the output time delay 18
19 Chapter 3 ; ASTABLE MODE A BRIEF INTRODUCTION OF THE TIMER CIRCUIT ASTABLE MODE TIMER CIRCUIT In the Astable Mode, the 555 becomes an oscillator producing continuous pulses at frequencies up to 2 MHz The output continually switches between the high and low states, producing a square wave. An astable circuit has NO STABLE state Timing components consists of two resistors, RA and RB with a capacitor, C that controls the delay time of output timer. The capacitor C is periodically charged and discharged between the trigger level VL = 1/3 VCC and the threshold level VH = 2/3 VCC.
SCHEMATIC CIRCUIT Figure 3.1 showsthe schematic circuit of Astable Mode. Reset pin (pin 4) is not to be used for reset purpose in this mode. Hence, it should be connected to pin 8 to avoid any possibility of false triggering. Astable continually triggers itself without any external trigger pulses at pin 2. Pin 2 is connected together with Pin 6. Figure 3.1 : Schematic circuit of Astable Mode 20
OUTPUT WAVEFORM Figure 3.2 : Output waveforms of Astable Mode Figure 3.2 shows the Astable Mode output waveform at pin 3 in a square wave. The capacitor voltage waveform is shown at pin 2. During the output timer is in Time Low (TL) state, the capacitor, C is discharging through resistor RB starting from 2/3 Vcc to 1/3 Vcc. Meanwhile, during the output timer is in Time High (TH) state, the capacitor, C is charging through resistor RA and RB from 1/3 Vcc to 2/3 Vcc. 21
22 FORMULA FOR GENERATING DELAY TIME TIME HIGH, TH Output of the astable circuit is high during the charge time, TH: TH = 0.693(RA + RB) C TIME LOW TL The output is low during the discharge time, TL: TL = 0.693(RB) C DUTY CYCLE, D The ratio of RA and RB precisely sets the duty cycle, D: D= TH/(TH+TL ) PERIOD, T The total period: T = TH + TL = 0.693 (RA + 2RB) C FREQUENCY, F The astable circuit’s frequency of oscillation: F = 1/T = (1.44) / [ (RA+ 2RB)C ] MARK TO SPACE RATIO Timing resistors and capacitors in the circuit control when the time output is high (the mark time) and when the time output is low (the space time). Mark to space ratio = Time High (TH)/Time Low (TL) = TH : TL
23 REFERENCES https://circuitdigest.com/electronic-circuits/555-timer-monostable-circuit-diagram https://www.electronics-tutorials.ws/waveforms/monostable.html https://www.electronics-tutorials.ws/waveforms/555_timer.html https://www.CircuitsToday 1
ELECTRONIC CIRCUITS This book is suitable for students who are majoring engineering field. It introduces students to the basic concept of 555 Timer. Upon this book, students should be able to apply the concept and principles of electronic circuits in various type of circuits engineering applications. PENERBIT POLITEKNIK MERLIMAU MELAKA webmaster[@]pmm.edu.my 24