Dell Inspiron N4030_DELL_Wistron_Arsenal_DJ1_Discrete_Rev-1

54 3 2 1

SSID = PWR.Plane.Regulator_1p8v APL5930 for +1.8V_RUN

+3.3V_ALW +1.8V_RUN_VIN

D +5V_ALW +1.8V_RUN_VIN D
PG5102 C
DY
21 PC5102 21 PC510421 +1.8V_RUN_P +1.8V_RUN
SC1U10V3KX-3GP Do Not Stuff21
Do Not Stuff
PG5103 PC5103
21 SC10U6D3V5MX-3GP

Do Not Stuff

PU5102 VCNTL 6 Design Current =1.23A PG5104
12
49,50,86,88 RUNPW ROK 7 POK VIN#5 5 +1.8V_RUN_P
8 EN VIN#9 9 Do Not Stuff
22,37,42,50,86 PM_SLP_S3# 1 2 1D8V_RUN_EN DY PG5105
PR5102 Do Not Stuff VOUT#3 3
VOUT#4 4 12

Do Not Stuff

A00 10.03.16 PC510821212121
Do Not Stuff
PR5108 21 1 GND FB 2 PC5107
47KR2J-2-GP SC22U6D3V5MX-2GP
5912_1.8V_RUN_FB PC5106
APL5930KAI-TRG-GP SC68P50V2JN-1GP

SO-8-P PR5104
16K5R2F-2-GP

C

Do Not Stuff
21
PC5105
DY 1

Vout=0.8V*(R1+R2)/R2

PR5105
13K3R2F-L1-GP

2

SSID = PWR.Plane.Regulator_1p8v

APL5930 for +1.8V_DELAY

B B

+5V_ALW +1.8V_DELAY_VIN

+3.3V_ALW +1.8V_DELAY_VIN

PG5106 PC510921 PC511121DY
21 SC1U10V3KX-3GP Do Not Stuff21
Design Current =1.13A
+3.3V_ALW 21 Do Not Stuff PR5103 PC5110 +1.8V_DELAY_P +1.8V_DELAY
PG5108 SC10U6D3V5MX-3GP +1.8V_DELAY_P
PR5110 21 Do Not Stuff PG5101
10KR2F-2-GP PU5101 VCNTL 6 12
Do Not Stuff 1 DY 2 7 POK

49,50,86,88 RUNPW ROK VIN#5 5
VIN#9 9

37 1.8V_DELAY_EN 1 2 1D8V_DELAY_EN 8 EN VOUT#3 3 Do Not Stuff
PR5101 Do Not Stuff VOUT#4 4 PG5107
PC5114
16 Vo=0.8*(1+(R1/R2)) A00 10.03.16 21 21 Do Not Stuff2121DY21 12
25 Do Not Stuff
Q5101 34 21 DY 1 GND FB 2 PC5101 Do Not Stuff
DMN66D0LDW -7-GP PC5112 SC22U6D3V5MX-2GP
+1.8V_DELAY PR5111 APL5930KAI-TRG-GP
PR5109 47KR2J-2-GP 5912_1.8V_DELAY_FB PC5113
SC68P50V2JN-1GP
SO-8-P
PR5106
16K5R2F-2-GP

A +1.8V_DELAY1_1 2 DISCRETE PARK A

10R3F-GP 1 Wistron Corporation
1.8V_DELAY_EN
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
5
Taipei Hsien 221, Taiwan, R.O.C.

Vout=0.8V*(R1+R2)/R2 PR5107 Title
13K3R2F-L1-GP
43 APL5930_+1.8V_RUN
2 Rev
Size Document Number
A01
A3 Arsenal DJ1 Discrete
92
Date: Thursday, May 06, 2010 Sheet 51 of
1
2

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 52 of 92

4321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 53 of 92

4321

SSID = VIDEO SSID = Inverter

INVERTER POWER

LVDS CONNECTOR GFX_PW R_SRC +PW R_SRC

+LCDVDD C5402
SC1KP50V2KX-1GP
LCD1 GFX_PW R_SRC 21 +3.3V_RUN F5401
49 C5408 12
Do Not Stuff
SCD1U10V2KX-4GPC5411 21 POLYSW -1D1A24V-GP-U
21
LCD_BRIGHTNESS
LCD_TST

DY DY
47 51 DY DYR5401 21 C5403
40 Do Not Stuff 12SCD1U50V3KX-GP
39 21
38 R5404 1 2 LBKLT_CTL 81 EC5405
37 100KR2J-1-GP R5415 100R2J-2-GP BRIGHTNESS 37 Do Not Stuff
36 21
35 LCD_BRIGHTNESS +3.3V_DELAY 12 DY1 2 EC5406
LCD_CBL_DET#_C Do Not Stuff Do Not Stuff
46 34 BLON_OUT_C LDDC_CLK 81 R5408
33 LCD_TST_C LDDC_DATA 81
32 R5407
31 LDDC_CLK VGA_TXAOUT0- 81
30 LDDC_DATA VGA_TXAOUT0+ 81 DY Do Not Stuff
29 LCD_DET_G VGA_TXAOUT1- 81
28 VGA_TXAOUT1+ 81 12 For EMI request
VGA_TXAOUT0- VGA_TXAOUT2- 81
45 27 VGA_TXAOUT0+ VGA_TXAOUT2+ 81 A00 10.03.09 EMI requirement
26 VGA_TXACLK- 81
25 VGA_TXAOUT1- VGA_TXACLK+ 81 TR5401 3 USB_PN11 21
24 VGA_TXAOUT1+ 2 USB_PP11 21
23 +3.3V_CAMERA
22 VGA_TXAOUT2-
21 VGA_TXAOUT2+

44 20 VGA_TXACLK-
19 VGA_TXACLK+
18
17 USB_CAMERA-
16 USB_CAMERA+
15
14 14

43 13 ACM2012-900-2P-T-GP SSID = VIDEO
12
11 LCD_CBL_DET#_C 1 2 LCD_CBL_DET# 37
10 LCD_TST_C R5417 1 2100R2J-2-GP LCD_TST 37
9 BLON_OUT_CR5412 1 2100R2J-2-GP BLON_OUT 37
8 LCD_DET_G R5416 1 2100R2J-2-GP
7 100R2J-2-GP LCD POWER
R5410
42 6
5
4
3
2

1
41 50

48

IPEX-CONN40-2R-GP-U

20.F1093.040 +LCDVDD

A00 10.03.15
C5412
Do Not StuffDY +3.3V_RUN
21
D5402 U5401
Digital Mic Power

+3.3V_RUN +3.3V_CAMERA 81 LCDVDD_EN 1 R5414 3 OUT IN#4 4
37 LCD_TST_EN 2 GND IN#5 5
Do Not Stuff 1 EN

R5411 3 ENVDD_D 1 2 ENVDD

1 2
Do Not Stuff
2 21 21
R5413 C5410
21 BAT54CPT-GP G5285T11U-GP
21 49K9R2F-L-GP SC1U10V2KX-1GP
DYEC5403 C5407 21DY A00 10.03.15
SC10U6D3V5MX-3GP C5409
Do Not Stuff Do Not Stuff

DISCRETE PARK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD/Inverter Connector Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete 92

Date: Thursday, May 06, 2010 Sheet 54 of

5 4321

SSID = VIDEO +5V_CRT_RUN

D RN5501 21 3 2 CRT1 D
SRN2K2J-1-GP 21 4 1 16 C
81 M_RED B
81 M_GREEN CRT_R 6
C 1 11
81 M_BLUE Layout Note:
7
*Pi-filter & 150 Ohm pull-down 81 DDC_DATA_CON DDC_DATA_CON CRT_G 2 12 DDC_DATA_CON
resistors should be as close 81 DDC_CLK_CON DDC_CLK_CON CRT_B 8
as to CRT CONN. 3 13 JVGA_HS
C5514 C5513 +5V_CRT_RUN 9
* RGB signal will hit 75 Ohm SC22P50V2JN-4GP SC22P50V2JN-4GP 4 14 JVGA_VS
first, then pi-filter, finally 10 Do Not Stuff
CRT CONN. 5 15 DDC_CLK_CON C5515
21
17
Do Not Stuff
D-SUB-15-81-GP C5516
21
AFTP5502 1 20.20401.015 DY DY

L5501 CRT_R AFTP5501 1 +5V_CRT_RUN
12 CRT_G AFTP5508 1 DDC_DATA_CON
BLM15BB220SS1D-GP CRT_B AFTP5503 1 DDC_CLK_CON
AFTP5506 1 CRT_R
L5502 AFTP5507 1 CRT_G
12 AFTP5504 1 CRT_B
BLM15BB220SS1D-GP
TP5505 1 JVGA_HS
L5503 TP5509 1 JVGA_VS
12
BLM15BB220SS1D-GP
12
R5501 DY DY DY

150R2F-1-GP
12

R5502
150R2F-1-GP
12

R5503
150R2F-1-GP

21
C5504

Do Not Stuff
21

C5505
Do Not Stuff
21

C5506
Do Not Stuff
21

C5507
SC8P250V2CC-GP

21
C5508

SC8P250V2CC-GP
21
C5509

SC8P250V2CC-GP

A00 10.03.15 +5V_RUN +5V_CRT_RUN

1 2 CRT_R D5501 9 DY 8
R5505 Do Not Stuff CRT_G 2
CRT_B U5501C
3 DY Do Not Stuff7 14 +5V_CRT_RUN +5V_RUN
10
+5V_CRT_RUN 1 +5V_CRT_RUN C5511 D5502
Do Not Stuff SCD01U16V2KX-3GP
12 DY 11 21
D5503
21DY C5512 2 U5501D 21 CH551H-30PT-GP
Do Not Stuff Do Not Stuff
Hsync & Vsync level shift 3 DY

B 1
Do Not Stuff
14
1 D5504
U5501A 2
81,83 VGA_HSYNC HSYNC_5
81,83 VGA_VSYNC 2 DY 3 3 DY

7 14 7 Do Not Stuff 1 7 14
4 Do Not Stuff 13
U5501B RN5502

5 DY 6 VSYNC_5 4 DY 1 JVGA_HS
3 2 JVGA_VS

Do Not Stuff Do Not Stuff

A00 10.03.15

1 2
R5504 Do Not Stuff

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT Connector

Size Document Number Rev

Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 55 of 92

54321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 56 of 92

4321

543 21
D D

C C

(Blanking) B

B DISCRETE PARK A

A Wistron Corporation
543
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 57 of 92

21

54321

SSID = User.Interface

DD

CC

SSID = Thermal Fan Connector

B B

A *Layout* 15 mil FAN1 31
5
39 EMC2102_FAN_TACH EMC2102_FAN_TACH AFTP5801 1 5 1 EMC2102_FAN_TACH
39 EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE 3 1 EMC2102_FAN_DRIVE
2
4 AFTP5802
1 AFTP5803
4
21
AK FOX-CON3-6-GP-U

20.D0210.103
20.F1293.003

C5801 D5801
SC10U6D3V5MX-3GP RB551V30-GP

DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP/Fan Connector Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 58 of 92

3 21

SSID = SATA

SATA HDD Connector

HDD1

+3.3V_RUN P1 V33 23 23
P2 V33 24 24
P3 V33

+5V_RUN P7 V5 NP1 NP1
P8 V5 NP2 NP2
C5902 P9 V5
SC10U6D3V5MX-3GP 21
21
21
21
C5906 C5903 DY DY C5901 P13 V12 GND S1
SCD1U16V2KX-3GP P14 V12 GND S4
Do Not Stuff P15 V12 GND S7
Do Not Stuff GND P4
GND P5
24 SATA_TXP0 S2 A+ GND P6
24 SATA_TXN0 S3 A- GND P10
GND P12
24 SATA_RXP0_C SCD01U16V2KX-3GP 1 2 C5905 SATA_RXP0 S6 B+
24 SATA_RXN0_C SCD01U16V2KX-3GP 1 2 C5904 SATA_RXN0 S5 B- DAS/DSS P11

SKT-SATA7P-15P-23-GP

22.10300.961

ODD Connector

ODD1

8
NP1
S1

S2 SCD01U16V2KX-3GP 1 2 C5907 SATA_TXP1 24 SATA_RX- and SATA_RX+ Trace
SCD01U16V2KX-3GP 1 2 C5908 SATA_TXN1 24 Length match within 20 mil
S3
SATA_RXN1_C 24 +5V_RUN
S4 SATA_RXP1_C 24
S5 SATA_RX1-_C
S6 SATA_RX1+_C

S7

P1 C590921 C5910
P2 SCD1U10V2KX-5GP 21 SC10U10V5KX-2GP
P3
P4
P5
P6
NP2
9

SKT-SATA7P-6P-4-GP

22.10300.811 DISCRETE PARK
22.10300.471

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/ODD Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete 92

Date: Thursday, May 06, 2010 Sheet 59 of

5 4321

SSID = AUDIO Speaker LINE1
Connector OUT
D
20.F0711.004 D
30 AUD_SPK_L- C
30 AUD_SPK_L+ 21 SPK1 30 AUD_HP1_JD# AUD_HP1_JACK_L2 L6001 AUD_HP1_JD# LINEOUT1
30 AUD_SPK_R- EC6001 30 AUD_HP1_JACK_L2 AUD_HP1_JACK_R2 6
30 AUD_SPK_R+ SC100P50V2JN-3GP 1 30 AUD_HP1_JACK_R2 1 BL2M18BD601SN1D-GP AUD_HP1_JACK_L1 5
21 2 L6002 2
C EC6002 3 1 2 AUD_HP1_JACK_R1 4
SC100P50V2JN-3GP 4 AFTP6013 1 BLM18BD601SN1D-GP 1
21 3
EC6003 FOX-CON4-19-GP EC6010 21 SCD01U50V2KX-1GP 7
SC100P50V2JN-3GP SC1KP50V2KX-1GP 21 EC6006 8
2120.F0693.004
EC6004 21SCD01U50V2KX-1GP PHONE-JK383-GP
SC100P50V2JN-3GP 21EC6005
EC6011 22.10133.K31
65 SC1KP50V2KX-1GP

AFTP6002 1 AUD_SPK_L- AFTP6010 1 AUD_HP1_JD# A00 10.03.31 AFTP6009 1
AFTP6003 1 AUD_SPK_L+ AFTP6011 1 AUD_HP1_JACK_L1 600ohm 100MHz
AFTP6004 1 AUD_SPK_R- AFTP6012 1 AUD_HP1_JACK_R1 200mA 0.5ohm DC
AFTP6005 1 AUD_SPK_R+

MIC IN Internal
Microphone

30 AUD_VREFOUT_B 21
21
R6001 R6002 MIC1 is in DIP
21
4K7R2J-2-GP 4K7R2J-2-GP C6001 MIC1
Do Not Stuff
SC1U10V3KX-3GP 30 INT_MIC_L_R 1
21 23.42143.001
A00 10.03.31 MICIN1 EC6007 21
EC6008 PHONE-JK383-GP SC1KP50V2KX-1GP 2
B SC100P50V2JN-3GP B
30 AUD_EXT_MIC_L 8
30 AUD_EXT_MIC_R AUD_EXT_MIC_L C6002 2 1 SC1U10V3KX-3GP 21MIC_IN_L_2R6009MIC_IN_L_C 7
EC6009Do Not StuffMIC_IN_R_C3
1
SC100P50V2JN-3GP214

AUD_EXT_MIC_R C6003 2 1 SC1U10V3KX-3GP MIC_IN_R_2 R6010 2
5
12 6
Do Not Stuff

30 EXT_MIC_JD#

22.10133.K31

1 AFTP6001

AFTP6006 1 MIC_IN_L_C A00 10.03.31
AFTP6007 1 MIC_IN_R_C
AFTP6008 1 EXT_MIC_JD#

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Jack Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 60 of 92

54 321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 61 of 92

4321

5 43 2 1
D
SSID = Flash.ROM SPI FLASH ROM (32M bits) for PCH +3.3V_RUN
C6203
D +3.3V_RUN SCD1U10V2KX-5GP

21 RN6201 C6201 DY 21 PCH_SPI_CLK 24
32 SRN4K7J-8-GP 21 PCH_SPI_DO 24
41 Do Not Stuff

R6202
4K7R2J-2-GP

PCH_SPI_HOLD_0#

U6201 +3.3V_RUN

24 PCH_SPI_CS0# PCH_SPI_CS0# 1 CS# VCC 8
24 PCH_SPI_DI 2 SO NC#7 7
1 2 PCH_SPI_DI_R 3 WP# SCK 6 PCH_SPI_HOLD_0#
PCH_SPI_W P# 4 GND 5
SI
R6201
15R2J-GP21 MX25L3205DM2I-12G-GP 21
21
DYEC6203 DY DYEC6201

Do Not Stuff EC6202

Do Not Stuff Do Not Stuff

CC

SPI FLASH ROM (2M bits) for KBC +KBC_PW R +KBC_PW R

C6206
SCD1U10V2KX-5GP
21 C6204 21
R6203 DY 23 RN6202 Do Not Stuff 21
14 SRN100KJ-6-GP DY
Do Not Stuff

EC_SPI_HOLD#

A00 10.03.15 U6202 +KBC_PW R

37 EC_SPI_CS# 1 2 EC_SPI_CS# 1 CS# VCC 8 EC_SPI_HOLD#
37 EC_SPI_DI R6204 1 2 Do Not Stuff EC_SPI_DI_R 2 SO HOLD# 7
37 EC_SPI_W P#_R R6205 3 WP# 6 EC_SPI_CLK 37
Do Not Stuff EC_SPI_W P# 4 GND SCLK 5 EC_SPI_DO 37
SI
21 EC_SPI_DO_R 1 2
21 33R2J-2-GP
12 R6206

EC6204 R6209 MX25L2005C-12G-GP 21
21
DY DY DYB B
Do Not Stuff 100KR2J-1-GP R6210 EC6205 EC6206

10KR2J-3-GP Do Not Stuff Do Not Stuff

SSID = RBATT RTC Connector

+3.3V_RTC_LDO

+RTC_CELL U6203

R6207 2 +RTC_VCC
Do Not Stuff

1 2 RTC_PWR_L 3 RTC1

A R6208 DISCRETE PARK A
1 RTC_PWR 1
21 2 1 PWR
2 GND
TP6201 1 NP1 NP1
NP2 NP2
C6207 1KR2J-1-GP Wistron Corporation
SC1U10V3KX-3GP
SDMG0340LC7F-GP-U 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Width=20mils BAT-CON2-1-GP-U

Title

TP6202 1 +RTC_VCC 62.70001.011 Flash/RTC Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 62 of 92

54 3 21

5 43 21
D
SSID = USB IO Board USB Power

D +5V_ALW A00 10.03.17 Change to GMT symbo +5V_USB1

DY U6302

at least 80 mil 1 8 at least 80 mil
2 7
21 37 USB_PWR_EN# 3 GND OUT#8 6 21
C6306 4 IN#2 OUT#7 5 C6304
Do Not Stuff IN#3 OUT#6
EN/EN# SC1U10V3KX-3GP
OC#

G547F2P81U-GP

USB_OC#0_1 21

Right USB Power

C A00 10.03.17 Change to GMT symbo +5V_USB2 C

+5V_ALW

U6301 AFTP6304 1 +5V_USB2
AFTP6302 1 USB_P2-
at least 80 mil 1 8 at least 80 mil AFTP6301 1 USB_P2+
2 7 AFTP6306 1 USB_P3-
21 37 USB_PWR_EN# 3 GND OUT#8 6 21 AFTP6305 1 USB_P3+
C6303 4 IN#2 OUT#7 5 R6301
Do Not Stuff IN#3 OUT#6
DY EN/EN# DY Do Not Stuff
OC# 21
C6301
G547F2P81U-GP
SCD1U10V2KX-5GP
USB_OC#2_3 21 21
C6302

SC1U10V3KX-3GP
21
TC6301

ST100U6D3VBM-7GP

USB1 7

+5V_USB2 5
1
USB_P2-
USB_P2+ 2
3
+5V_USB2 4
4 68

21 USB_PN2 USB_PN2 USB_P2-

TR6301 D6301 SKT-USB8-29-GP-U
1

B 23 B

14 DY

21 USB_PP2 USB_PP2 ACM2012-900-2P-T-GP USB_P2+ USB_P2+ 2 3 USB_P2-

Do Not Stuff

USB3 7

+5V_USB2 5
USB_P3- 1
USB_P3+
+5V_USB2 2
2 3
4
68

D6302 SKT-USB8-29-GP-U
1
4

21 USB_PN3 USB_PN3 USB_P3- DY

TR6302 3 22.10254.451
2

USB_P3+ 2 3 USB_P3-

A 14 Do Not Stuff DISCRETE PARK A

21 USB_PP3 USB_PP3 ACM2012-900-2P-T-GP USB_P3+ Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

USB

Size Document Number Rev

Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 63 of 92
1
543

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved

Size Document Number Rev

A3 Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 64 of 92

4321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 65 of 92

4321

5 4 32 1

SSID = User.Interface Battery LED

+5V_ALW

D POWER LED D
37 W HITE_LED_KBC C
LED-OW-3-GP White

Q6601 C LED_PW R# R6601 PW R_LED_B 3
E 12
B R1 21 330R2J-3-GP 1 83.00326.G70
83.01222.K70
R2 DY EC6601 2
PDTC124EU-1-GP Do Not Stuff

Amber

LED1

BATT LED

Q6602 C LED_BAT# R6602 BAT_LED_B
E 12
37 AMBER_LED_KBC B R1 330R2J-3-GP

R2 21DY EC6602
PDTC124EU-1-GP Do Not Stuff

C

B B

HDD LED BREATHE PWR LED (Front)

+5V_RUN White
HDD_LED_R
SATA_LED# PDTA144VT-GPR1 R6604 LED2 3 White PDTA144VT-GPR1 +5V_ALW
R2 21 HDD_LED 1A R2
24 SATA_LED# E K2 E BREATHE_LED#_R 2 LED3 3
B B R6605
37 PWRLED# 1 POWER_SW_LED_FRONT 1A K2
C 3 C 330R2J-3-GP
330R2J-3-GP LED-W -27-GP
Q6604 Q6605 LED-W -27-GP
83.01221.R70
84.00144.P11 84.00144.P11
83.01221.R70

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 66 of 92

54 21

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 67 of 92

4321

5 4 3 2 1

SSID = KBC SSID = Touch.Pad

D Internal KeyBoard Connector TouchPad Connector D
C
+5V_RUN B

KB1 1
31 AFTP6831

1 KB_DET# 37

2 KROW 7 1 +5V_RUN 21 C6802
SCD1U10V2KX-5GP
3 KROW 6 1 AFTP6827

4 KROW 4 1 AFTP6825

5 KROW 2 1 AFTP6824
AFTP6822
6 KROW 5 1

7 KROW 1 1 AFTP6823 32
AFTP6820 41
8 KROW 3 1

9 KROW 0 1 AFTP6821 RN6801
SRN10KJ-5-GP
10 KCOL5 1 AFTP6819
11 KCOL4 1 AFTP6817

12 KCOL7 1 AFTP6818 KROW [0..7] 37 TP1
13 KCOL6 1 AFTP6816 5

14 KCOL8 1 AFTP6814 1

15 KCOL3 1 AFTP6812 KCOL[0..16] 37 2
16 KCOL1 1 AFTP6813 3
4
17 KCOL2 1 AFTP6815 37 TPCLK 1
18 KCOL0 1 AFTP6810 37 TPDATA 6
19 KCOL12 1 AFTP6808
C6803 ACES-CON4-10-GP-U
C 20 KCOL16 1 AFTP6809 SC33P50V2JN-3GP 21 AFTP6811
21
21 KCOL15 1 AFTP6806

22 KCOL13 1 AFTP6807 C6804
23 KCOL14 1 AFTP6804 SC33P50V2JN-3GP
24 KCOL9 1 AFTP6805

25 KCOL11 1 AFTP6803
26 KCOL10 1 AFTP6801

27 AFTP6802 20.K0320.004
20.K0326.004
28
1 +5V_RUN
29 1 TPCLK
1 TPDATA
30 1
32 AFTP6829

HRS-CON30-1-GP-U AFTP6826
AFTP6828
AFTP6830

Main 20.K0421.030
20.K0259.030

B

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 68 of 92

54321

5432 1
D
+3.3V_ALW
D C

+3.3V_ALW C690321 HSC1
SCD1U10V2KX-5GP
1 DY R6901
Do Not Stuff LID_CLOSE#_1
LID_CLOSE# R6902 2 VDD VSS 1
Do Not Stuff 3 OUT
DY C690212
37 LID_CLOSE# Do Not Stuff 21

S-5711ACDL-M3T1S-GP

2

C

BB

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 69 of 92

54321

543 21
D D

C C

GF1 +3.3V_RUN

1 LPC_LAD0
LPC_LAD1
2 LPC_LAD2 LPC_LAD0 24,37
LPC_LAD3 LPC_LAD1 24,37
3 LPC_LFRAME# LPC_LAD2 24,37
LPC_LAD3 24,37
4 LPC_LFRAME# 24,37
PLT_RST# 9,21,37,76,80
5
PCLK_FWH 21
DY 6
7

8

9

10

11

12

Do Not Stuff

B B

A DISCRETE PARK A
543
Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 70 of 92

21

5 4 3 2 1
D
SSID = SDIO SD/XD/MS Card Reader C
B
D

+3.3V_RUN_CARD

DY DY DY
21
C7101

Do Not Stuff
21

C7102
Do Not Stuff
21

C7103
Do Not Stuff
21

C7104
SCD1U10V2KX-5GP

21
C7105

SC2D2U10V3KX-1GP

C

+3.3V_RUN_CARD CARD1

TP7101 1 23 SD_VCC SD_DAT0 25 XD_CLE/SD_D0/MS_D7 1 TP7102
14 MS_VCC SD_DAT1 29 XD_CE#/SD_D1 1 TP7103
33 XD_VCC SD_DAT2 10 XD_D5/SD_D2/MS_D5 1 TP7104
SD_DAT3 11 XD_D4/SD_D3/MS_D1 1 TP7105

32 XD_D0/SD_CLK/MS_D2 XD_D0/SD_CLK/MS_D2 8 XD_D0 SD_CMD 12 XD_D2/SD_CMD XD_D2/SD_CMD 32 32
32 XD_D1/SD_D5/MS_D0 XD_D1/SD_D5/MS_D0 9 XD_D1 SD_CLK 24 XD_D0/SD_CLK/MS_D2 XD_D0/SD_CLK/MS_D2 32
32 XD_D2/SD_CMD XD_D2/SD_CMD 26 XD_D2 SD_CD_SW 36 XD_W E#/SD_CD# XD_W E#/SD_CD# 32
32 XD_D3/SD_D4/MS_D4 XD_D3/SD_D4/MS_D4 27 XD_D3 SD_WP_SW 35 XD_RDY/SD_W P/MS_CLK
32 XD_D4/SD_D3/MS_D1 XD_D4/SD_D3/MS_D1 28 XD_D4 XD_RDY/SD_W P/MS_CLK
32 XD_D5/SD_D2/MS_D5 XD_D5/SD_D2/MS_D5 30 XD_D5
32 XD_D6/MS_BS XD_D6/MS_BS 31 XD_D6 MS_DATA0 19 XD_D1/SD_D5/MS_D0 1 XD_D4/SD_D3/MS_D1 32
32 XD_D7 XD_D7 32 XD_D7 MS_DATA1 20 XD_D4/SD_D3/MS_D1 1 TP7107
MS_DATA2 18 XD_D0/SD_CLK/MS_D2 TP7108
32 XD_RDY/SD_W P/MS_CLK XD_RDY/SD_W P/MS_CLK 1 XD_R/B MS_DATA3 16 XD_ALE/SD_D7/MS_D3 1
32 XD_RE#/MS_INS# XD_RE#/MS_INS# 2 XD_RE TP7109
32 XD_CE#/SD_D1 XD_CE#/SD_D1 3 XD_CE MS_BS 21 XD_D6/MS_BS XD_RE#/MS_INS# 32
32 XD_CLE/SD_D0/MS_D7 4 XD_CLE MS_INS 17 XD_RE#/MS_INS# XD_RDY/SD_W P/MS_CLK 32
32 XD_ALE/SD_D7/MS_D3 XD_CLE/SD_D0/MS_D7 5 XD_ALE MS_SCLK 15 XD_RDY/SD_W P/MS_CLK
32 XD_W E#/SD_CD# XD_ALE/SD_D7/MS_D3 6 XD_WE
32 XD_W P/SD_D6/MS_D6 7 XD_WP 4IN1_GND 13
32 XD_CD# XD_W E#/SD_CD# 34 XD_CD_SW 4IN1_GND 22
XD_W P/SD_D6/MS_D6 4IN1_GND 38
NP1 NP1 4IN1_GND 37
XD_CD# NP2 NP2

B 1 TP7110

CARDBUS36P-1-GP

20.I0109.001
20.I0081.011

XD_CLE/SD_D0/MS_D7 TP7111 1 XD_D1/SD_D5/MS_D0 DISCRETE PARK A
XD_CE#/SD_D1 TP7112 1 XD_D2/SD_CMD
XD_D5/SD_D2/MS_D5 TP7113 1 XD_D3/SD_D4/MS_D4
XD_D4/SD_D3/MS_D1 TP7114 1 XD_D7
XD_D2/SD_CMD TP7115 1 XD_RDY/SD_W P/MS_CLK
XD_D0/SD_CLK/MS_D2 TP7116 1 XD_RE#/MS_INS#
XD_W E#/SD_CD# TP7117 1 XD_W E#/SD_CD#
A XD_RDY/SD_W P/MS_CLK TP7118 1 XD_W P/SD_D6/MS_D6
TP7119 1 XD_CD#
DY DY DY DY DY DY DY DY
TP7121 1 XD_D2/SD_CMD
For EMI

543
21 Wistron Corporation
EC7101
Do Not Stuff 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21
EC7102 Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff
21
EC7103
Do Not Stuff
21
EC7104
Do Not Stuff
21
EC7105
Do Not Stuff
21
EC7106
Do Not Stuff
21
EC7107
Do Not Stuff
21
EC7108
Do Not Stuff

Title

CARD Reader CONN Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete 92

Date: Thursday, May 06, 2010 Sheet 71 of
1
2

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 72 of 92

4321

5432 1
D
SSID = User.Interface C
B
D

Bluetooth Module conn.

AFTP7319 1 BLUETOOTH_DET# BT1 BT_ACT +3.3V_RUN

15
NP1
12

W LAN_ACT 34

AFTP7311 1 BDC_ON 56 USB_PP9
21
R7305BLUETOOTH_EN 7 8 USB_PN9

AFTP7308 Do Not Stuff1 BT_LED 9 10
21
C AFTP7318 EC73061 BLUETOOTH_GPIO3 11 12
Do Not Stuff
AFTP7316 1 BLUETOOTH_GPIO5 21 13 14

R7304 NP2
10KR2J-3-GP
16
SC2D2U10V3KX-1GP 1 AFTP7313
C7303
HRS-CONN14D-GP-U
21
21 USB_PP9 20.F0987.014 AFTP7314 1 WLAN_ACT
21 USB_PN9 AFTP7309 1 BLUETOOTH_EN
USB_PP9 AFTP7315 1 BT_ACT
76 BT_ACT USB_PN9 AFTP7312 1 +3.3V_RUN
37,76 BLUETOOTH_EN BT_ACT AFTP7310 1 USB_PP9
BLUETOOTH_EN AFTP7317 1 USB_PN9
76 WLAN_ACT W LAN_ACT

DY DY

B

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Bluetooth Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 73 of 92

54321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 74 of 92

4321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 75 of 92

4321

5 4 32 1
D
SSID = PWR.Support C
B
D 65 +PW R_SRC
+PW R_SRC NP2

BATT SMBUS 37 BAT_SDA CLK_PCIE_MINI1# 64 66 +5V_ALW E51_RXD 37
WLAN SMBUS 37 BAT_SCL CLK_PCIE_MINI1 +KBC_PW R E51_TXD 37
7,18,19,23 PCH_SMBDATA 31 30 +3.3V_ALW
WLAN CLK 7,18,19,23 PCH_SMBCLK PCIE_RXN2 32 29 BAT_IN# 37
WLAN PCIE 23 CLK_PCIE_MINI1# PCIE_RXP2 33 28 +3.3V_RUN AC_IN# 37
WLAN PCIE 23 CLK_PCIE_MINI1 34 27 PSID_DISABLE# 37
PCIE_TXN2 35 26 PSID_EC 37
WLAN USB 23 PCIE_RXN2 PCIE_TXP2 36 25 AD_IA 37
23 PCIE_RXP2 37 24 W IFI_RF_EN 37
USB_PN5 38 23 MINI1_CLK_REQ# 23
23 PCIE_TXN2 USB_PP5 39 22 PCIE_W AKE# 22
23 PCIE_TXP2 40 21 PLT_RST# 9,21,37,70,80
41 20
21 USB_PN5 42 19 PM_LAN_ENABLE 37
21 USB_PP5 43 18 KBC_PWRBTN# 37
44 17
LAN CLK 23 CLK_PCIE_LAN# 45 16 BT_ACT 73
23 CLK_PCIE_LAN 46 15 BLUETOOTH_EN 37,73
47 14
LAN PCIE 23 PCIE_RXN3 48 13 WLAN_ACT 73
23 PCIE_RXP3 49 12
50 11
C 23 PCIE_TXN3 51 10
23 PCIE_TXP3 52 9
LAN PCIE 53 8
54 7
21 USB_PN0 USB_PN0 55 6 +1.5V_RUN
56 5 +5V_USB1
57 4
USB Port 21 USB_PP0 USB_PP0 58 3
59 2

60 1

63 61

IOBD1 62
NP1

ACES-CONN60C-1-GP-U

20.F1563.060

B

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 76 of 92

54321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 77 of 92

4321

5 4321
D D

C (Blanking) C
B
B
DISCRETE PARK A
A
5 Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 78 of 92

4321

A B C +PW R_SRC
D
C7905 1 C7904 1 R7910 1 C7903 1 C7902 1 R7906 2 R7904 1 R7903 1 R7902 1 R7901 1 1H13 H1 21 DY DY +1.8V_RUN 21
C7901 1 R7905 1 1 Do Not Stuff Do Not Stuff EC7914
A01 10.05.03 1 EC7926
54 2Do Not Stuff 2Do Not Stuff 2Do Not Stuff 2Do Not Stuff 2Do Not Stuff A001SCD1U25V2ZY-1GP 10.03.15 2Do Not Stuff 2Do Not Stuff 2Do Not Stuff 2Do Not Stuff 1 H4 Do Not StuffDY DY DY DY DY DY DY DY DY DY DY DY DY DY +1.05V_VTT SCD1U25V2ZY-1GP 54321
2Do Not Stuff Do Not Stuff
2Do Not Stuff 1 21 21
1 H6 1 EC7913
1 Do Not Stuff 1 EC7927
Do Not Stuff SCD1U25V2ZY-1GP
A00 10.04.01 1 1 DY
1 21 21
H7 H8 EC7905
1 Do Not Stuff Do Not Stuff EC7928
Do Not Stuff SCD1U25V2ZY-1GP
11 SPR3 HMI2 A00 10.03.09 Remove HBT1 H2 H21
SPRING-51-GP STF217R128H83-GP Do Not Stuff Do Not Stuff 21 21
21 EC7904
EC7969 DY +VCC_GFX_CORE +1.5V_RUN +VCC_CORE EC7933 +3.3V_RUN
Do Not Stuff SCD1U25V2ZY-1GP
Do Not Stuff H3 H22 DY
21 Do Not Stuff Do Not Stuff 21 21
EC7952 EC7907
DY EC7934
Do Not Stuff Do Not Stuff Do Not Stuff
H23 DY DY
21 Do Not Stuff 21 21
EC7968 EC7908
DY EC7929
Do Not Stuff Do Not Stuff SCD1U25V2ZY-1GP
H2021 H18 DY DY +3.3V_ALW
Do Not StuffEC7966 Do Not Stuff 21 21
EC7910
+3.3V_ALW Do Not Stuff EC7901
21 Do Not Stuff SCD1U25V2ZY-1GP
DY DY EC7965
21 21
3 Do Not Stuff EC7906
EC7931
+1.05V_VTT Do Not StuffDY DY +3.3V_DELAY SCD1U25V2ZY-1GP +5V_ALW

DY DY DY 21 21 DY DY
EC7909
EC7932
Do Not Stuff SCD1U25V2ZY-1GP

21 21
EC7920
EC7912
Do Not Stuff Do Not Stuff

21 21
EC7919 EC7921
SCD1U10V2KX-4GP
Do Not Stuff
21
21 EC7923
EC7925 SCD1U10V2KX-4GP

Do Not Stuff 21
EC7922
21
EC7915 Do Not Stuff

Do Not Stuff 21
EC7924
21
EC7916 Do Not Stuff

Do Not Stuff 21
EC7911
21
EC7917 Do Not Stuff

Do Not Stuff 21
EC7903
21
EC7918 Do Not Stuff

Do Not Stuff 21
EC7902
21 SCD1U10V2KX-4GP
EC7944
21
Do Not Stuff EC7930

21 Do Not Stuff
EC7946
21
Do Not Stuff EC7940

+1.8V_RUN +1.8V_RUN +3.3V_RUN 21 +PW R_SRC Do Not Stuff
EC7956
Do Not Stuff 12 EC7963 +1.05V_VTT Do Not Stuff 12 EC7967 +5V_ALW Do Not Stuff EC7970 SCD1U25V2ZY-1GP A00 10.03.23 21
EC7942
DY DY 12 21 DY DY DY DY DY DY DY
EC7960 Do Not Stuff
DY SCD1U25V2ZY-1GP
21
2 +1.05V_VTT 21 EC7936
EC7955
21 DY +1.8V_RUN SCD1U25V2ZY-1GP +3.3V_RUN Do Not Stuff
EC7971
Date: Thursday, May 06, 2010 A3 Arsenal DJ1 Discrete Size Document Number Title DISCRETE PARK +PW R_SRC DY 21 DY DY +1.05V_VTT 21 DY DY DY DY 21
Do Not Stuff EC7949 EC7951 EC7935
UNUSED PARTS/EMI Capacitors SCD1U25V2ZY-1GP EC7962
12 21 Do Not Stuff Do Not Stuff Do Not Stuff
EC7961
21 21 21
Do Not Stuff EC7948 EC7950 EC7943

21 Do Not Stuff Do Not Stuff Do Not Stuff
EC7957
+3.3V_RUN DY DY DY DY +5V_ALW +3.3V_RUN 21 21
Do Not Stuff EC7959 EC7939
Do Not Stuff
21 Do Not Stuff Do Not Stuff
EC7964
21 21
Do Not Stuff EC7953 EC7938

21 Do Not Stuff Do Not Stuff
EC7954
Wistron Corporation 12 21
Do Not Stuff EC7937
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, DY
21 Do Not Stuff
Taipei Hsien 221, Taiwan, R.O.C. EC7947
Sheet 79 EC7958 +3.3V_ALW
1 Do Not Stuff

of

92 Rev

A01

A B D
C

5 43 2 1

SSID = VIDEO PCIE_MTX_GRX_P[0..15] PCIE_MTX_GRX_P[0..15] 8 D
PCIE_MTX_GRX_N[0..15] PCIE_MTX_GRX_N[0..15] 8
D
PCIE_MRX_GTX_P[0..15] PCIE_MRX_GTX_P[0..15] 8
PCIE_MRX_GTX_N[0..15] PCIE_MRX_GTX_N[0..15] 8

U8001A 1 OF 7

PCIE_MTX_GRX_P0 AF30 PCIE_RX0P PCIE_TX0P AH30 PCIE_MRX_GTX_R_P0 C8002 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P0
PCIE_MTX_GRX_N0 AE31 PCIE_RX0N PCIE_TX0N AG31 PCIE_MRX_GTX_R_N0
1 2 PCIE_MRX_GTX_N0
C8003 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P1 AE29 PCIE_RX1P PCIE_TX1P AG29 PCIE_MRX_GTX_R_P1 C8004 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P1
PCIE_MTX_GRX_N1 AD28 PCIE_RX1N PCIE_TX1N AF28 PCIE_MRX_GTX_R_N1
1 2 PCIE_MRX_GTX_N1
C8005 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P2 AD30 PCIE_RX2P PCIE_TX2P AF27 PCIE_MRX_GTX_R_P2 C8006 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P2
PCIE_MTX_GRX_N2 AC31 PCIE_RX2N PCIE_TX2N AF26 PCIE_MRX_GTX_R_N2
1 2 PCIE_MRX_GTX_N2
C8007 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P3 AC29 PCIE_RX3P PCIE_TX3P AD27 PCIE_MRX_GTX_R_P3 C8008 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P3
PCIE_MTX_GRX_N3 AB28 PCIE_RX3N PCIE_TX3N AD26 PCIE_MRX_GTX_R_N3
1 2 PCIE_MRX_GTX_N3
C8009 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P4 AB30 PCIE_RX4P PCI EXPRESS INTERFACE PCIE_TX4P AC25 PCIE_MRX_GTX_R_P4 C8010 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P4
PCIE_MTX_GRX_N4 AA31 PCIE_RX4N PCIE_TX4N AB25 PCIE_MRX_GTX_R_N4
1 2 PCIE_MRX_GTX_N4
C8011 SCD1U16V2KX-3GP

CC

PCIE_MTX_GRX_P5 AA29 PCIE_RX5P PCIE_TX5P Y23 PCIE_MRX_GTX_R_P5 C8012 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P5
PCIE_MTX_GRX_N5 Y28 PCIE_RX5N PCIE_TX5N Y24 PCIE_MRX_GTX_R_N5
1 2 PCIE_MRX_GTX_N5
C8013 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P6 Y30 PCIE_RX6P PCIE_TX6P AB27 PCIE_MRX_GTX_R_P6 C8014 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P6
PCIE_MTX_GRX_N6 W31 PCIE_RX6N PCIE_TX6N AB26 PCIE_MRX_GTX_R_N6
1 2 PCIE_MRX_GTX_N6
C8015 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P7 W29 PCIE_RX7P PCIE_TX7P Y27 PCIE_MRX_GTX_R_P7 C8016 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P7
PCIE_MTX_GRX_N7 V28 PCIE_RX7N PCIE_TX7N Y26 PCIE_MRX_GTX_R_N7
1 2 PCIE_MRX_GTX_N7
C8017 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P8 V30 PCIE_RX8P PCIE_TX8P W24 PCIE_MRX_GTX_R_P8 C8018 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P8
PCIE_MTX_GRX_N8 U31 PCIE_RX8N PCIE_TX8N W23 PCIE_MRX_GTX_R_N8
1 2 PCIE_MRX_GTX_N8
C8019 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P9 U29 PCIE_RX9P PCIE_TX9P V27 PCIE_MRX_GTX_R_P9 C8020 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P9
PCIE_MTX_GRX_N9 T28 PCIE_RX9N PCIE_TX9N U26 PCIE_MRX_GTX_R_N9
1 2 PCIE_MRX_GTX_N9
C8001 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P10 T30 PCIE_RX10P PCIE_TX10P U24 PCIE_MRX_GTX_R_P10 C8021 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P10
PCIE_MTX_GRX_N10 R31 PCIE_RX10N PCIE_TX10N U23 PCIE_MRX_GTX_R_N10
1 2 PCIE_MRX_GTX_N10
C8022 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P11 R29 PCIE_RX11P PCIE_TX11P T26 PCIE_MRX_GTX_R_P11 C8023 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P11
PCIE_MTX_GRX_N11 P28 PCIE_RX11N PCIE_TX11N T27 PCIE_MRX_GTX_R_N11
1 2 PCIE_MRX_GTX_N11
C8024 SCD1U16V2KX-3GP

B PCIE_MTX_GRX_P12 P30 T24 PCIE_MRX_GTX_R_P12 C8025 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P12 B
PCIE_MTX_GRX_N12 N31 T23 PCIE_MRX_GTX_R_N12
PCIE_RX12P PCIE_TX12P 1 2 PCIE_MRX_GTX_N12
PCIE_RX12N PCIE_TX12N C8026 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P13 N29 PCIE_RX13P PCIE_TX13P P27 PCIE_MRX_GTX_R_P13 C8027 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P13
PCIE_MTX_GRX_N13 M28 PCIE_RX13N PCIE_TX13N P26 PCIE_MRX_GTX_R_N13
1 2 PCIE_MRX_GTX_N13
C8028 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P14 M30 PCIE_RX14P PCIE_TX14P P24 PCIE_MRX_GTX_R_P14 C8029 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P14
PCIE_MTX_GRX_N14 L31 PCIE_RX14N PCIE_TX14N P23 PCIE_MRX_GTX_R_N14
1 2 PCIE_MRX_GTX_N14
C8030 SCD1U16V2KX-3GP

PCIE_MTX_GRX_P15 L29 PCIE_RX15P PCIE_TX15P M27 PCIE_MRX_GTX_R_P15 C8031 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P15
PCIE_MTX_GRX_N15 K30 PCIE_RX15N PCIE_TX15N N26 PCIE_MRX_GTX_R_N15
1 2 PCIE_MRX_GTX_N15
C8032 SCD1U16V2KX-3GP

23 CLK_PCIE_VGA CLK_PCIE_VGA AK30 CLOCK
23 CLK_PCIE_VGA# CLK_PCIE_VGA# AK32
PCIE_REFCLKP
PCIE_REFCLKN

1 PARK2 L9 NC#L9 DVCNTL_1 CALIBRATION Y22 PCIE_CALRP R8001 1 2 1K27R2F-L-GP +1.1V_RUN
N9 NC#N9DVCNTL_2 PCIE_CALRP AA22 PCIE_CALRN R8002 1 2 2KR2F-3-GP
N10 PCIE_CALRN
NC_PWRGOOD
R8003 10KR2F-2-GP

1 2 VGA_RST# AL27 PERSTB
R8022 Do Not Stuff
DYA DISCRETE PARK A
9,21,37,70,76 PLT_RST#

M92-S2-GP Wistron Corporation

37 PLTRST_DELAY# 1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R8021 Do Not Stuff
Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA PCIE(1/4) Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 80 of 92

54 3 21

5 4 3 2 1
2 OF 7 U8001F
SSID = VIDEO 75mA 6 OF 7

L8101 +DPLL_PVDD

+1.8V_DELAY 12 U8001B
BLM15BD121SS1D-GP
L8102 +DPLL_VDDC LVDS CONTROL VARY_BL AB11 LBKLT_CTL 54
DIGON AB12 LCDVDD_EN 54
12 125mA SC10U6D3V5KX-1GP R8103
BLM15BD121SS1D-GP C8101
+1.1V_RUN AF2 D
21 AF4
SC10U6D3V5KX-1GP X01 M92/ PARK switch SC10U6D3V5KX-1GP TXCAP_DPA3P AH20 R810210KR2J-3-GP
C8103 TXCAM_DPA3N AG3 AJ19 21
C8108 MUTI GFX AG5 TXCLK_UP_DPF3P VGA_TXACLK+ 54 21
21 21 TX0P_DPA2P TXCLK_UN_DPF3N AL21 VGA_TXACLK- 54
SC1U10V3KX-3GP RN8102 SCD01U16V2KX-3GP DPA TX0M_DPA2N AH3 AK20 VGA_TXAOUT0+ 54 10KR2J-3-GP
AH1 TXOUT_U0P_DPF2P VGA_TXAOUT0- 54
C8110 1 8 C8109 TX1P_DPA1P TXOUT_U0N_DPF2N AH22 VGA_TXAOUT1+ 54
21 7 DPC_VSSR_2 21 TX1M_DPA1N AK3 AJ21 VGA_TXAOUT1- 54
SCD01U16V2KX-3GP 2 PARK AK1 TXOUT_U1P_DPF1P VGA_TXAOUT2+ 54
6 DPC_VSSR_5 DPC_VSSR_5 AA1 DVPCNTL_MVP_0 DPC_VSSR#5 TX2P_DPA0P TXOUT_U1N_DPF1N AL23 VGA_TXAOUT2- 54
C8111 3 5 DPC_VSSR_1 DVPCNTL_MVP_1 TX1P_DPC1P TX2M_DPA0N AK5 AK22
21 4 DVPCNTL_0 DVDATA_7 AM3 TXOUT_U2P_DPF0P
DVPCNTL_1 TX2M_DPC0N TXCBP_DPB3P TXOUT_U2N_DPF0N AK24
D Y4 TXCBM_DPB3N AK6 AJ23
DVPCNTL_2 TXCCM_DPC3N AM5 TXOUT_U3P
M92/ PARK switch SRN0J-7-GP AC7 DVPCLK DPC_VSSR TX3P_DPB2P TXOUT_U3N
TX3M_DPB2N AJ7
Y2 DVPDATA_0 DVDATA_0 AH6
DVPDATA_1 TX0M_DPC2NDPB TX4P_DPB1P
+1.8V_DELAY U5 DVPDATA_2 DVDATA_1 TX4M_DPB1N AK8
DPC_VSSR_1 U1 DVPDATA_3 TXCCP_DPC3P AL7
L8109 DVPDATA_4 DVDATA_4 TX5P_DPB0P
X01change tolerant 10/01/15 83 DVPDATA0 Y7 DVPDATA_5 DPC_VSSR TX5M_DPB0N
1 PARK 2 83 DVPDATA1 DVPDATA_6 DVDATA_5
V2 DVPDATA_7 TX0P_DPC2P
BLM15BD121SS1D-GP 83 DVPDATA2 DVPDATA_8 DVDATA_6
Y8 DVPDATA_9 TX1M_DPC1N
DVPDATA_10DPC_VDD18#1
130mA V4 DVPDATA_11DPC_PVDD
DVPDATA_12DVDATA_9
DPC_VDD18_1 AB7 DVPDATA_13TX2P_DPC0P LVTMDP
DVPDATA_14DVDATA_8
DPC_VSSR_2 W1 DVPDATA_15DPC_VDD10#1 +DAC1_AVDD +1.8V_DELAY
DVPDATA_16DVDATA_12
21 C8134 AB8 DVPDATA_17DPC_VDD10#2 70mA L8103 TXCLK_LP_DPE3P AL15 VGA_TXACLK+
C8135 SC1U6D3V2KX-GP DVPDATA_18DVCNTL_0 TXCLK_LN_DPE3N AK14 VGA_TXACLK-
SC10U6D3V5MX-3GP W3 DVPDATA_19DVDATA_3
21 DVPDATA_20DVDATA_11 TXOUT_L0P_DPE2P AH16 VGA_TXAOUT0+
21 C8136 1 PARK2DPC_VDD18_2 AB9 DVPDATA_21DVDATA_2 12 TXOUT_L0N_DPE2N AJ15 VGA_TXAOUT0-
DVPDATA_22DVDATA_10 BLM15BD121SS1D-GP
PARK PARK SCD1U10V2KX-5GP R8104 W5 DVPDATA_23DPC_VDD18#2 21 TXOUT_L1P_DPE1P AL17 VGA_TXAOUT1+
0R2J-2-GP C8112 TXOUT_L1N_DPE1N AK16 VGA_TXAOUT1-
+1.1V_RUN PARK DPC_VDD18_1 AC6
110mA DPC_VDD10_1 SCD01U16V2KX-3GP TXOUT_L2P_DPE0P AH18 VGA_TXAOUT2+
DPC_PVDD W6 21 TXOUT_L2N_DPE0N AJ17 VGA_TXAOUT2-
C8114
AD7 TXOUT_L3P AL19
SC1U6D3V2KX-GP TXOUT_L3N AK18
L8108 AA3 21
C8115
1 PARK 2 AC8
SC4D7U6D3V5KX-3GP
BLM15BD121SS1D-GP X01 DPC_VDD10_1 AA5

AE8

21 C8128 DPC_VDD10_2 AA6
C8129 SC1U6D3V2KX-GP
SC10U6D3V5MX-3GP AE9 +DAC1_VDD1DI +1.8V_DELAY
21
21 C8130 1 PARK2DPC_VDD10_2 AB4 L8104

PARK PARK PARK SCD1U10V2KX-5GP R8105 AD9 45mA
0R2J-2-GP
AB2 12
BLM15BD121SS1D-GP
AC10 21
C8116
DPC_VDD18_2 AC5
SCD01U16V2KX-3GP
21 M92-S2-GP
C8117
X01
SCD1U10V2KX-5GP
I2C 21
C8118

SC1U6D3V2KX-GP

R1 SCL C
C R3 SDA

GENERAL PURPOSE I/O R AM26 M_RED R8108 1 2 150R2F-1-GP M_RED 55
RB AK26 M_GREEN R8110 1 2 150R2F-1-GP M_GREEN 55
+3.3V_DELAY DY2 1R8109 VGA_CLK_REQ# 83 GPIO_VGA_00 U6 GPIO_0 M_BLUE R8111 1 2 150R2F-1-GP
83 GPIO_VGA_01 U10 G AL25 M_BLUE 55
Do Not Stuff 83 GPIO_VGA_02 T10 GPIO_1 GB AJ25

U8 GPIO_2 B AH24
BB AG25
THERMTRIP_R U7 GPIO_3_SMBDATA
HSYNC AH26
T9 GPIO_4_SMBCLK VSYNC AJ27
T8
TP8101 1 83 GPIO_VGA_05 VGA_GPIO_6 GPIO_5_AC_BATT DAC1 AD22

PANEL_BKEN 1 R8112 2Do Not Stuff PANEL_BKEN_1 T7 GPIO_6 AG24 VGA_HSYNC 55,83 +DAC2_VDD2DI +1.8V_DELAY
AE22 VGA_VSYNC 55,83
37 PANEL_BKEN TP8113 1 GPIO_VGA_08 P10 GPIO_7_BLON DY DY 50mA 2
AE23 Do Not Stuff
GPIO_VGA_09 P4 GPIO_8_ROMSO AD23 1
P2 R8101
83 GPIO_VGA_09 GPIO_9_ROMSI AM12 (Placed between this pin and AVSSQ)
AK12 DY
N6 GPIO_10_ROMSCK VGA_RSET 1 2 21
N5 AL11 R8113 499R2F-2-GP C8105
83 GPIOTP_V81G1A4_11 1 GPIO_VGA_12 GPIO_11 RSET AJ11
Do Not Stuff
TP8115 1 GPIO_VGA_13 N3 GPIO_12 70mA AVDD AK10 +DAC1_AVDD 21
AVSSQ AL9 C8106
6 21 GPIO_13
5 S 45mA VDD1DI AH12 Do Not Stuff
4 VSS1DI AM10 21
D AJ9 C8107
G Y9 GPIO_14_HPD2
AL13 Do Not Stuff
Q8101 DY R8114 N1 AJ13
DMN66D0LDW-7-GP Do Not Stuff 86 PWRTPC8N1T1L6_0 1 GPIO16_SSIN M4 GPIO_15_PW RCNTL_0 +DAC1_VDD1DI M92/ PARK switch
37 THERMTRIP_VGA# TP8102 1 VGA_THERM# R6 AD19
9,25,37,42 H_THERMTRIP# GPIO_16_SSIN AC19

TP8103 1 VGA_GPIO_18 W 10 GPIO_17_THERMAL_INT AE20
THERMTRIP_VGA M2 AE17
1 GPIO_18_HPD3
2 AE19
3
AG13
P8 GPIO_19_CTF +1.8V_DELAY
P7 AE6
86TPP8W1R17CNTL_11 VGA_GPIO_21 N8 GPIO_20_PW RCNTL_1 R2 AE5 L8107
TP8118 1 GPIO_VGA_22 R2B
GPIO_21_BB_EN AD2 1 PARK 2
G2 AD4
VGA_CLK_REQ# N7 GPIO_22_ROMCSB G2B AC11 BLM15BD121SS1D-GP 20mA
AC13
T11 GPIO_23_CLKREQB B2 DPC_PVDD
B2B AD13
R11 GPIO_29_DRM_0 GND AD11 +DAC2_A2VDDQ +1.8V_DELAY
GPIO_30_DRM_1
AB22 21
37 THERMTRIP_VGA_GATE Q4210 . TP8119 JTAG_TRSTB L6 JTAG_TRSTB AC22 C8132 1.5mA L8105
2N7002E-1-GP ... . L5 JTAG_TDI SC10U6D3V5MX-3GP
TP8121 1 JTAG_TDI L3 JTAG_TCK AE16 12
83 JTAG_TESTEN JTAG_TCK L1 JTAG_TMS AD16 21 BLM15BD121SS1D-GP
JTAG_TMS K4 JTAG_TDO AC1 C8131
AF24 TESTEN AC3 SC1U6D3V2KX-GP
1 JTAG_TDO
AD20 21
AC20 C8133

SCD1U10V2KX-5GP
21
C8120

SCD1U10V2KX-5GP
21
C8121

SC1U6D3V2KX-GP
PARK PARK PARK

B TP8108 1 GENERICA AB13 DAC2 C B
Y
TP8109 1 GENERICB W8 GENERICA COMP DAC2_HSYNC 83
GENERICB DAC2_VSYNC 83
+1.8V_DELAY W9 GENERICC H2SYNC
W7 GENERICD V2SYNC +DAC2_VDD2DI
GENERICE_HPD4
TP8110 1 GENERICE_HPD4 AD10

2 12 1 TP8120 1 TP_HPD1 AC14 HPD1 40mA VDD2DI +3.3V_DELAY
VSS2DI
R8118 VREFG VOLTAGE DIVIDER IS
499R2F-2-GP (VREFG = VDDR4,5(1.8V) / 3 = .6V)

65mA A2VDD +DAC2_A2VDD +DAC2_A2VDD
1mA A2VDDQ
VGA_VREFG AC16 VREFG +DAC2_A2VDDQ +3.3V_DELAY DY DY 130mA 2
A2VSSQ Do Not Stuff
R8120 R8122 1
715R2F-GP 2K2R2J-2-GP R8129

LDDC_CLK 54 DY
LDDC_DATA 54
C8127
DDC_CLK_CON 55 Do Not Stuff
DDC_DATA_CON 55
R8119 21 R2SET VGA_R2SET 1 2 2K2R2J-2-GP
249R2F-GP C8119 R8121
12
SCD1U10V2KX-5GP R8123 12

+3.3V_DELAY +DPLL_PVDD Do Not Stuff 21 +3.3V_DELAY
C8124
DDC/AUX VGA_DDC1CLK
VGA_DDC1DATA Do Not Stuff
21
C8126

Do Not Stuff
21

PLL/CLOCK DDC1CLK 1 2
DPLL_PVDD 75mA DDC1DATA 1 2
DPLL_PVSS
+DPLL_VDDC AF14 AUX1P R8124 5V @ CRT side
AE14 DPLL_VDDC 125mA AUX1N
1 DY 2 JTAG_TMS Do Not Stuff RN8101
R8131 Do Not Stuff XTALIN DDC2CLK
XTALOUT DDC2DATA R8125 3 2
2 JTAG_TESTEN 1
1 10KR2J-3-GP AUX2P Do Not Stuff 4 DY
R8132 AUX2N
2 JTAG_TRSTB AD14 M92CRT_DDCCLK 1 2 +3.3V_DELAY
Do Not Stuff
1 DY M92CRT_DDCDATA 1 2 Do Not Stuff
R8130
R8127 R8126
12
7 CLK_VGA_27M_NSS XTALIN_R AM28 Do Not Stuff
80D6R2F-L-GP 1 VGA_XTALOUT AK28
21 TP8123 Q8103
7 CLK_VGA_27M_SS DY1 2 JTAG_TCK R8128 M92CRT_DDCDATA 43 DDC_DATA_CON
Do Not Stuff 150R2F-1-GP DDC_CLK_CON M92CRT_DDCCLK
R8133 5 DY 2 DDC_DATA_CON 55
A
XO_IN2 NC#AB22 61
XO_IN NC#AC22
Do Not Stuff
A SIGNALS Normal 39 VGA_THERMDA T4 DPLUS THERMAL 55 DDC_CLK_CON
mode Debug mode 39 VGA_THERMDC T2 DMINUS

JTAG_TESTEN 0 1 L8106 TP8112 1 FAN_PWM R5 DDCAUX5P
+TSVDD AD17 DDCAUX5N
+1.8V_DELAY 12 AC17 TS_FDO DISCRETE PARK
JTAG_TRSTB BLM15BD121SS1D-GP TSVDD 5mA DDC6CLK
0 1 DDC6DATA
SC1U10V3KX-3GP TSVSS
C8122 NC_DDCAUX7P
JTAG_TCK NC 1 NC_DDCAUX7N Wistron Corporation
21
21 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

C8123 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U10V2KX-5GP
JTAG_TMS 1 1

M92-S2-GP Title

VGA LVDS/TV/CRT(2/4)
Size Document Number Rev

C Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 81 of 92

5432 1

5 4 3 2 1
+1.5V_RUN_GPU
SSID = VIDEO U8001E 5 OF 7 2A

D AA27 PCIE_VSS GND A3 +1.5V_RUN_GPU
AB24 A30
C AB32 PCIE_VSS GND AA13 SC10U10V5ZY-1GP DY DY 21
AC24 AA16 C8201 C8205
AC26 PCIE_VSS GND AB10 Do Not Stuff
AC27 AB15 21 C8204 Do Not Stuff
AD25 PCIE_VSS GND AB6 SC10U6D3V5KX-1GP 21
AD32 AC9 21
AE27 PCIE_VSS GND AD6 C8202 C8206
AF32 AD8 21 SC1U6D3V2KX-GP
AG27 PCIE_VSS GND AE7
AH32 AG12 21
PCIE_VSS GND AH10 C8207 +1.8V_DELAY
K28 AH28
K32 PCIE_VSS GND B10 SCD1U10V2KX-5GP 400mA
L27 B12 21
M32 PCIE_VSS GND B14 C8208 2A
N25 B16
N27 PCIE_VSS GND B18 SCD1U10V2KX-5GP DY
P25 B20 21
P32 PCIE_VSS GND B22 C8209 11A 21
R27 B24 C8221
T25 B26 SCD1U10V2KX-5GP 2A
T32 B6 21 SC1U6D3V2KX-GP
U25 B8 C8210 21
U27 C1 C8222
V32 C32 SC1U6D3V2KX-GP
W25 E28 21 SCD1U10V2KX-5GP
W26 F10 C8211 21
W27 F12 C8223
Y25 F14 SCD1U10V2KX-5GP
Y32 F16 SC1U6D3V2KX-GP
PCIE_VSS GND F18 21
M6 F2 C8224
N11 PCIE_VSS GND F20 21 U8001D 4 OF 7 DY
N12 F22 C8212 MEM I/O SC1U6D3V2KX-GP
N13 PCIE_VSS GND F24 21 +1.1V_RUN D
N16 F26 SCD1U10V2KX-5GP C8225
N18 PCIE_VSS GND F6 21
N21 F8 C8213 SC1U6D3V2KX-GP
PCIE_VSS GND G10 PCIE 21
P6 G27 SCD1U10V2KX-5GP C8226
P9 PCIE_VSS GND G31 21 H13 PCIE_VDDR AB23 Do Not Stuff
R12 G8 C8214 H16 PCIE_VDDR AC23 21
R15 PCIE_VSS GND H14 H19 VDDR1 PCIE_VDDR AD24 C8218
R17 H17 SCD1U10V2KX-5GP J10 VDDR1 PCIE_VDDR AE24
R20 PCIE_VSS GND H2 21 J23 VDDR1 PCIE_VDDR AE25 SC10U6D3V5KX-1GP
T13 H20 C8215 J24 VDDR1 PCIE_VDDR AE26
T16 PCIE_VSS GND H6 VDDR1 500mA PCIE_VDDR AF25
T18 J27 SCD1U10V2KX-5GP J9 VDDR1 PCIE_VDDR AG26
T21 PCIE_VSS GND J31 21 K10 VDDR1
T6 K11 C8227 K23 VDDR1 2.2A
U15 K2 K24 VDDR1
U17 K22 SCD1U10V2KX-5GP VDDR1
U20 K6 21 K9 VDDR1
U3 C8216 L11 VDDR1
U9 A32 L12 VDDR1
V13 AM1 SCD1U10V2KX-5GP L13 VDDR1
V16 AM32 21 L20 VDDR1
V18 C8217 L21 VDDR1
V6 L22 VDDR1
Y10 SCD1U10V2KX-5GP
Y15
Y17 PCIE_VSS GND
Y20
Y6 PCIE_VSS GND

PCIE_VSS GND

PCIE_VSS GND

PCIE_VSS GND

PCIE_VSS GND L23
L24
PCIE_VSS GND PCIE_VDDC L25
L26
PCIE_VSS GND PCIE_VDDC M22 21
N22 C8231
PCIE_VSS GND X01 M92/ PARK switch PCIE_VDDC N23
N24 SC1U6D3V2KX-GP
PCIE_VSS GND PCIE_VDDC R22 21
T22 C8232
GND PCIE_VDDC U22
V22 SC1U6D3V2KX-GP
GND +1.8V_DELAY 2A PCIE_VDDC 21
PCIE_VDDC C8233
GND L8213 L8201 17mA Do Not Stuff
21
GND 1 PARK 2 12 +VDD_CT PCIE_VDDC C8235
BLM15BD121SS1D-GP
GND GND BLM15BD121SS1D-GP 21 PCIE_VDDC SC1U6D3V2KX-GP
300mA C8351 21
GND GND PARK LEVEL PCIE_VDDC C8238
SC4D7U6D3V3KX-GP TRANSLATION
GND GND 21 PCIE_VDDC SC1U6D3V2KX-GP
C8241 VDD_CT 21
VDD_CT C8239
SC1U6D3V2KX-GP VDD_CT
21 VDD_CT SC10U6D3V5KX-1GP
C8242
GND GND 50mA +SPV18 AA20 PCIE_VDDC
GNDGND SC1U6D3V2KX-GP AA21
GND 21 21 AB20 136mA AA15
GND GND C82127 C8243 AB21 N15
N17
GND GND SCD1U10V2KX-5GP C8212921 SCD1U10V2KX-5GP CORE VDDC R13
21 VDDC R16
GND GND PARK SC1U10V2KX-1GP C8244 VDDC R18 +VCC_GFX_CORE
VDDC R21 C
GND GND +3.3V_DELAY SCD1U10V2KX-5GP VDDC T12
VDDC T15
GND GND I/O VDDC T17
VDDC T20
GND GND AA17 VDDR3 VDDC U13
AA18 VDDR3 VDDC U16
GND GND X01 M92/ PARK switch 60mA AB17 VDDR3 60mA VDDC U18
AB18 VDDR3 170mA 170mA VDDC U21
GND GND VDDC V15 21
VDDC V17 C8245
GND GND L8214 75mA +MPV18 21 VDDC V20
C8248 VDDC V21 SC1U6D3V2KX-GP
GND GND 1 PARK 2 VDDC Y13 21
SC1U6D3V2KX-GP VDDC Y16 C8246
BLM15BD121SS1D-GP 21 VDDC Y18
C8256 VDDC Y21 SC1U6D3V2KX-GP
PARK VDDC 21
SC1U6D3V2KX-GP VDDC C8247
21 VDDC
C8249 SC1U6D3V2KX-GP
21
SCD1U10V2KX-5GP C8250
21
C8258 SCD1U10V2KX-5GP
21
SCD1U10V2KX-5GP C8251

SCD1U10V2KX-5GP
21
C8252

SC1U6D3V2KX-GP
21
C8253

SC1U6D3V2KX-GP
21
C8254

SC1U6D3V2KX-GP
21
C8255

SC1U6D3V2KX-GP
21
C8257
Do Not Stuff
21
C8259

SC1U6D3V2KX-GP
21
C8260

SC1U6D3V2KX-GP
21
C8261

SC1U6D3V2KX-GP
21
C8262

SC1U6D3V2KX-GP
21
C8263

SC1U6D3V2KX-GP
GND GND 21 DY
C82125
GND GND 21 C82130 R8201 1 M92 2 Do Not Stuff +VDDR5 U11 +VCC_GFX_CORE
SCD1U10V2KX-5GP U12
GND GND PARK SC1U10V2KX-1GP V11 VDDR5
V12 VDDR5 VDDR4
GND GND VDDR5
VDDR5 VDDR4
GND GND

GND POWER

GND DPC_VSSR

GND AA11
AA12
GND +1.8V_DELAY VDDR4
Y11 VDDR4
GND PARK S3 Y12 VDDR4
VDDR4 VDDR4
GND Y11 pin--DVCLK (not use)
Y12 pin--VDDR4
GND 21
U11 pin--NC C8264
GND VSS_MECH U12 pin--VDDR4
V11 pin--NC SC1U6D3V2KX-GP
GND VSS_MECH V12 pin--VDDR4 21
AA11 pin--NC C8265
AA12 pin--NC
SCD1U10V2KX-5GP
+1.8V_DELAY 21
L8203 C8266

12 SCD1U10V2KX-5GP
BLM15BD121SS1D-GP 21
C8267
120ohm 300mA
SCD1U10V2KX-5GP
21

C8203
Do Not Stuff
GND VSS_MECH +1.5V_RUN_GPU L8202 +VDDRHA L17 MEM CLK
2 +PCIE_PVDD L16 VDDRHA
GND 1 M92 VSSRHA
+MPV18 AM30
GND DPC_VSSR Do Not Stuff +SPV18 L8 PLL ISOLATED 21
+SPV10 H7 PCIE_PVDD 40mA CORE I/O C8270
300mA H8
J7 NC_MPV18 SC1U6D3V2KX-GP
M92-S2-GP M92 VDDCI M13 21
NC_SPV18 VDDCI M15 C8271
SPV10 100mA VDDCI M16
SPVSS VDDCI M17 SC1U10V2KX-1GP
VDDCI M18 21
VDDCI M20 C8272
VDDCI M21
VDDCI N20 SC1U10V2KX-1GP
21
C8273

SC1U6D3V2KX-GP
21
C8274

SC1U6D3V2KX-GP
21
C8275

SC10U6D3V5KX-1GP

X01 M92/ PARK switch

+PCIE_PVDD

+VCC_GFX_CORE BACK BIAS
BBP#1 144mA
SC10U6D3V5KX-1GP SC1U6D3V2KX-GP 21 M11 BBP#2 +VCC_GFX_CORE
C8276 C8277 C8279 M12
DY
21 21 SCD1U10V2KX-5GP M92-S2-GP 21
C8280
B +1.8V_DELAY B
SC10U6D3V5KX-1GP +SPV10
L8204 SC1U6D3V2KX-GP +1.8V_DELAY 21
C8284 C8281
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GSPC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP 200mA +DPE_VDD18 U8001G 130mA Do Not Stuff
21
12 SCD1U10V2KX-5GP SCD1U10V2KX-5GPSCD1U10V2KX-5GP SCD1U10V2KX-5GP 7 of 7 1 PARK 2 21
BLM15BD121SS1D-GP C82128
21 21 R8209 0R3J-0-U-GP SC10U6D3V5MX-3GP

120ohm 500mA C8285 C8286 DP E/F POWER DP A/B POWER 21
C82126
PARK-S3: AG15 DPE_VDD18 170mA 200mA NC_DPA_VDD18 AE11 +DPA_VDD18 SCD1U10V2KX-5GP
[email protected] AG16 DPE_VDD18 NC_DPA_VDD18 AF11 21
C8293
+1.1V_RUN SC1U6D3V2KX-GP +1.1V_RUN X01 M92/ PARK switch SCD01U16V2KX-3GP
L8206 C8295
120mA 110mA 2
12 21 Do Not Stuff
BLM18PG471SN1D-GP +DPE_VDD10 AG20 DPE_VDD10 DPA_VDD10 AF6 +DPA_VDD10 1 +1.1V_RUN L8211
AG21 DPE_VDD10 DPA_VDD10 AF7 +VCC_GFX_CORE
120ohm 500mA 21 21 R8210 1 PARK 2

C8294 C8296 BLM15BD121SS1D-GP

L8207 200mA +DPF_VDD18 AG14 DPE_VSSR DPA_VSSR AE1 PARK-S3: L8212 2
AH14 DPE_VSSR DPA_VSSR AE3 [email protected]
12 SC1U6D3V2KX-GP 120mA AM14 DPE_VSSR DPA_VSSR AG1 1 M92
BLM15BD121SS1D-GP C82101 AM16 DPE_VSSR DPA_VSSR AG6 PARK-S3:[email protected]
+DPF_VDD10 AM18 DPE_VSSR DPA_VSSR AH5 M92-S2:[email protected] Do Not Stuff
120ohm 500mA 21
C82100 21 21 C82102
PARK-S3: AF16 DPF_VDD18 170mA 200mA 130mA AE13
[email protected] AG17 DPF_VDD18 AF13
NC_DPB_VDD18
NC_DPB_VDD18

+1.1V_RUN 110mA
L8208
21 SC1U6D3V2KX-GP 21 AF22 DPF_VDD10 DPB_VDD10 AF8
12 C82107 AG22 DPF_VDD10 DPB_VDD10 AF9
BLM18PG471SN1D-GP
C82106 21 C82108
120ohm 500mA

AF23 DPF_VSSR DPB_VSSR AF10
AG23 DPF_VSSR DPB_VSSR AG9
AM20 DPF_VSSR DPB_VSSR AH8
AM22 DPF_VSSR DPB_VSSR AM6
AM24 DPF_VSSR DPB_VSSR AM8

R8204

150R2F-1-GP R8205

A 2 1 DPEF_CALR_GND 150R2F-1-GP A

AF17 DPEF_CALR DPAB_CALR AE10 DPAB_CALR_GND 1 2

+DPE_VDD18 +1.8V_DELAY

1 2 +DPE_PVDD AG18 20mA DP PLL POWER 20mA AG8 +DPA_PVDD 1 2
R8202 Do Not Stuff AF19 AG7 Do Not Stuff
DPE_PVDD DPA_PVDD R8206 DISCRETE PARK
DPE_PVSS DPA_PVSS

+DPF_VDD18 Wistron Corporation

1 2 +DPF_PVDD AG19 20mA 20mA AG10 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R8203 Do Not Stuff AF20 AG11
NC_DPF_PVDD DPB_PVDD Taipei Hsien 221, Taiwan, R.O.C.
NC_DPF_PVSS DPB_PVSS

M92-S2-GP Title

VGA POWER/GND(3/4)

Size Document Number Rev

A2 Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 82 of 92
1
5432

543 21

SSID = VIDEO U8001C 3 OF 7

84,85 MDA[0..63] MDA0 K27 DQA_0 MEMORY INTERFACE MAA_0 K17 MAA0 MAA[0..12] 84,85 ATI RESERVED CONFIGURATION STRAPS
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) MDA1 J29 DQA_1 MAA_1 J20 MAA1
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) MDA2 H30 DQA_2 MAA_2 H23 MAA2 RDQSA0 and WDQSA0 = differential pair ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
MDA3 H32 DQA_3 MAA_3 G23 MAA3 RDQSA1 and WDQSA1 = differential pair THEY MUST NOT CONFLICT DURING RESE
D MDA4 G29 DQA_4 MAA_4 G24 MAA4 ETC
MDA5 F28 DQA_5 MAA_5 H24 MAA5 GPIO3 , H2SYNC , V2SYNC
MDA6 F32 DQA_6 MAA_6 J19 MAA6
MDA7 F30 DQA_7 MAA_7 K19 MAA7 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
MDA8 C30 DQA_8 MAA_8 J14 MAA8 THEY MUST NOT CONFLICT DURING RESET
MDA9 F27 DQA_9 MAA_9 K14 MAA9
MDA10 A28 DQA_10 MAA_10 J11 MAA10 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDA11 C28 DQA_11 MAA_11 J13 MAA11
MDA12 E27 DQA_12 MAA_12 H11 MAA12 BA2 84,85 Size of the primary Part Number GPIO[13,12,11] D
MDA13 G26 DQA_13 MAA_13/BA2 G11 BA2 BA0 84,85 memory apertures GPIO[13,12,11] Manufacturer C
MDA14 D26 DQA_14 MAA_14/BA0 J16 BA0 BA1 84,85 B
MDA15 F25 DQA_15 MAA_15/BA1 L15 BA1
MDA16 A25 DQA_16 128MB x000 ST M25P05A 0100
MDA17 C25 DQA_17 DQMA_0 E32 DQMA#0 V 256MB x001 Microelectronics M25P10A 0101
MDA18 E25 DQA_18 DQMA_1 E30 DQMA#1 x010 M25P20 0101
MDA19 D24 DQA_19 DQMA_2 A21 DQMA#2 DQMA#[0..3] 84 64MB x M25P40 0101
MDA20 E23 DQA_20 DQMA_3 C21 DQMA#3 DQMA#[4..7] 85 32MB x M25P80 0101
MDA21 F23 DQA_21 DQMA_4 E13 DQMA#4 512MB x
MDA22 D22 DQA_22 DQMA_5 D12 DQMA#5 1GB x Chingis Pm25LV512A 0100
MDA23 F21 DQA_23 DQMA_6 E3 DQMA#6 2GB x (formerly PMC) Pm25LV010A 0101
MDA24 E21 DQA_24 DQMA_7 F4 DQMA#7 4GB
X02 10.03.09 MDA25 D20 DQA_25
MDA26 F19 DQA_26 RDQSA_0 H28 RDQSA0
Park-S3 M92-SX MDA27 A19 DQA_27 RDQSA_1 C27 RDQSA1 RDQSA[0..3] 84
MDA28 D18 DQA_28 RDQSA_2 A23 RDQSA2 RDQSA[4..7] 85
DIVIDER RESISTORS DDR2/3 DDR2/3 MDA29 F17 DQA_29 RDQSA_3 E19 RDQSA3 STRAPS PIN DESCRIPTION
MDA30 A17 DQA_30 RDQSA_4 E15 RDQSA4 GPIO0
MVREF TO 1.8V 40.2R 100R MDA31 C17 DQA_31 RDQSA_5 D10 RDQSA5 TX_PWRS_ENB Tansmitter Power Savings Enable
MDA32 E17 DQA_32 RDQSA_6 D6 RDQSA6 (Internal PD) GPIO1 V 0= 50% Tx output swing
MVREF TO GND 100R 100R MDA33 D16 DQA_33 RDQSA_7 G5 RDQSA7 WDQSA[0..3] 84
MDA34 F15 DQA_34 TX_DEEMPH_EN GPIO2 1= Full Tx output swing
MDA35 A15 DQA_35 W DQSA_0 H27 WDQSA0 WDQSA[4..7] 85 (Internal PD)
MDA36 D14 DQA_36 W DQSA_1 A27 WDQSA1 Transmitter De-emphasis Enable
MDA37 F13 DQA_37 W DQSA_2 C23 WDQSA2 ODTA0 84 BIF_GEN2_EN_A V 0= Tx de-emphasis disabled
MDA38 A13 DQA_38 W DQSA_3 C19 WDQSA3
MDA39 C13 DQA_39 W DQSA_4 C15 WDQSA4 ODTA1 85 1= Tx de-emphasis enabled
MDA40 E11 DQA_40 W DQSA_5 E9 WDQSA5
+1.5V_RUN_GPU MDA41 A11 DQA_41 W DQSA_6 C5 WDQSA6 CLKA0 84 V 0 = Advertises the PCI-E device
MDA42 C11 DQA_42 W DQSA_7 H4 WDQSA7 CLKA0# 84 as 2.5GT/s
C MDA43 F11 DQA_43
R8301 MDA44 A9 DQA_44 ODTA0 L18 ODTA0 1 = Advertises the PCI-E device
40D2R2F-GP MDA45 C9 DQA_45 ODTA1 K16 ODTA1 as 5GT/s
MDA46 F9 DQA_46
2 12 1 MDA47 D8 DQA_47 CLKA0 H26 CLKA0 CLKA1 85
21 MDA48 E7 DQA_48 CLKA0B H25 CLKA0# CLKA1# 85
C8301 MDA49 A7 DQA_49
MDA50 C7 DQA_50 CLKA1 G9 CLKA1 RASA0# 84 BIF_CLK_PM_EN GPIO8 V 0= Disable CLKREQ#power management capability
SCD01U16V2KX-3GP MDA51 F7 DQA_51 CLKA1B H9 CLKA1# RASA1# 85 1= Enable CLKREQ# power management capability
21 MDA52 A5 DQA_52
C8302 MDA53 E5 DQA_53 RASA0B G22 RASA0# CASA0# 84 ROMIDCFG[3:0] if BIOS_ROM_EN=1,then Config[3:0]
MDA54 C3 DQA_54 RASA1B G17 RASA1# CASA1# 85
SCD1U16V2KX-3GP MDA55 E1 DQA_55
MDA56 G7 DQA_56 CASA0B G19 CASA0# CSA0_0# 84 GPIO[13,12,11] defines the ROM type
MDA57 G6 DQA_57 CASA1B G16 CASA1#
+1.5V_RUN_GPU R8302 MDA58 G1 DQA_58 (Internal PD) if BIOS_ROM_EN=0,then Config[3:0]
100R2F-L1-GP-U MDA59 G3 DQA_59 CSA0B_0 H22 CSA0_0#
MDA60 DQA_60 CSA0B_1 J22 defines the primary memory apeture size
MDA61 J6 DQA_61 CSA1_0# CSA1_0# 85
MDA62 J1 DQA_62 CSA1B_0 G13
MDA63 J3 DQA_63 CSA1B_1 K13
J5

R8303 +1.5V_RUN_GPU MVREFD K26 MVREFDA CKEA0 K20 CKEA0 CKEA0 84 Enable external BIOS ROM device
40D2R2F-GP MVREFS J26 MVREFSA CKEA1 J17 CKEA1 CKEA1 85
12 1 WEA0# BIOS_ROM_EN GPIO_22_ROMCSB V 0= Disable external BIOS ROM device
R8304 NC_MEM_CALRN0 W EA0B G25 WEA1# WEA0# 84
NC_MEM_CALRN1 TESTEN W EA1B H10 WEA1# 85 1= Enable external BIOS ROM device
240R2F-1-GP1 PARK2 VGA_CALRN0 J25 MAA13_R 1 DY (Internal PD)
R83015 PARK 2 VGA_CALRN1 K7 MEM_CALRP1 DPC_CALR RSVD#1 AB16
81 JTAG_TESTEN NC_MEM_CALRP0 RSVD#2 G14 R8308
R8306 0R2J-2-GP RSVD#3 G20 AUD[1:0]
DRAM_RST V 00:No audio function
150R2F-1-GP1 2 VGA_CALRP1 J8 AUD[1] VGA_HSYNC
CLKTESTA AUD[0] VGA_VSYNC 01:Audio for DisplayPort and HDMI
21 1 PARK2 VGA_CALRP0 K25 CLKTESTB ( if adapter is detected)
C8303 (Internal PD)
R8307 2 MAA13 MAA13 84,85 10:Audio for DisplayPort only
SCD01U16V2KX-3GP Do Not Stuff 11:Audio for both DisplayPort and HDMI
R8309 21 240R2F-1-GP MEM_RST_RC L10
100R2F-L1-GP-U C8304 +1.5V_RUN_GPU

2 SCD1U16V2KX-3GP R8310 K8
12 1 Do Not Stuff L7

M92 R_MEM_2 +3.3V_DELAY

M92-S2-GP

R_MEM_3 R8334 VGA_CLKTESTB DYR8314 1 2 Do Not Stuff STRAPS PIN DESCRIPTION
51R2J-2-GP VGA_CLKTESTA
84,85 MEM_RST 81 GPIO_VGA_00 MEMORY TYPE,MAKE AND SIZE INFO
12 81 GPIO_VGA_01 00 - gDDR3 64Mx16 Hynix
81 GPIO_VGA_02 01 - gDDR3 64Mx16 Samsung
R_MEM_1 21 C_MEM DYR8315 1 2 Do Not Stuff MEM_TYPE DVPDATA(2,0) V 10 - gDDR3 128Mx16 Hynix
(Internal PD) 11 - gDDR3 128Mx16 Samsung
R8313 PARK C8305
route 50ohms
B 10KR2J-3-GP SC68P50V2JN-1GP R8311 21 single-ended/100ohms diff DYR8316 1 2 Do Not Stuff
Do Not Stuff C8307
2 21
21 SCD1U10V2KX-5GP
21
R8312 C8306
Do Not Stuff
SCD1U10V2KX-5GP
M92 M92 PARK PARK and keep short DYR8317 1 2 Do Not Stuff

81 GPIO_VGA_05

X01 M92/ PARK switch Use this option ONLY +1.8V_DELAY
for Park-S3

21 81 GPIO_VGA_09 DYR8319 1 2 Do Not Stuff 81 DVPDATA0 VRAM1 2
R8332 81 GPIO_VGA_11 81 DVPDATA2 10KR2J-3-GP
81 DVPDATA1 R8328
51D1R2F-GP
21

R8333
51D1R2F-GP
Designator For M9X-S2 For Park-S3 PARK PARK R8320 1 2 10KR2J-3-GP DY1 2
R_MEM_1 DNI 10K Do Not Stuff
R8329

DY1 2
Do Not Stuff
R8330

R_MEM_2 OR/Short 51R

R_MEM_3 2.2K DNI

C_MEM 2.2nF 68pF DYR8324 1 2 Do Not Stuff

81 DAC2_VSYNC DYR8325 1 2 Do Not Stuff
81 DAC2_HSYNC

55,81 VGA_VSYNC DYR8326 1 2 Do Not Stuff

55,81 VGA_HSYNC DYR8327 1 2 Do Not Stuff

AA

DISCRETE PARK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA MEMORY/STRAPS(4/4) Rev
Size Document Number
A01
C Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 83 of 92

54321

5 4 3 2 1

SSID = VIDEO Place blow decouping caps close VDD pin.

Place blow decouping caps close VDD pin. +1.5V_RUN_GPU

+1.5V_RUN_GPU

C8401 C8412
SC1U6D3V2KX-GP Do Not Stuff
21
21
C8402 C8413
SCD1U10V2KX-5GP
Do Not Stuff
21 21
C8414
C8403
SC1U6D3V2KX-GP SC1U6D3V2KX-GP
21
21 C8415
C8404
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP 21
21 C8416
C8405
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP 21
21 C8417
C8406
Do Not Stuff SCD1U10V2KX-5GP
21 21
C8407 C8418

SC1U6D3V2KX-GP SC1U6D3V2KX-GP
21 21
C8408 C8419
Do Not Stuff
SC1U6D3V2KX-GP 21
21 C8420
C8409 Do Not Stuff
21
SC10U6D3V5MX-3GP C8421
21
C8410 SC10U6D3V5MX-3GP
21
SC10U6D3V5MX-3GP C8422
21 Do Not Stuff
C8411 21
Do Not Stuff
21
D D

DY DY DY DY DY DY DY

+1.5V_RUN_GPU +1.5V_RUN_GPU +1.5V_RUN_GPU
U8401 U8402

21 83,85 MDA[0..63] MDA[0..63]
R8403 83 RDQSA[0..3]
VREF=0.75V K8 VDD DQL0 E3 MDA18 83 WDQSA[0..3] K8 VDD DQL0 E3 MDA24
4K99R2F-L-GP VREFDQ_0_2 K2 VDD DQL1 F7 MDA17 K2 VDD DQL1 F7 MDA25
N1 VDD DQL2 F2 MDA16 N1 VDD DQL2 F2 MDA26
21 R9 VDD DQL3 F8 MDA21 R9 VDD DQL3 F8 MDA27
R8405 B2 VDD DQL4 H3 MDA20 B2 VDD DQL4 H3 MDA28
D9 VDD DQL5 H8 MDA19 D9 VDD DQL5 H8 MDA29
4K99R2F-L-GP G7 VDD DQL6 G2 MDA22 G7 VDD DQL6 G2 MDA30
21 R1 VDD DQL7 H7 MDA23 R1 VDD DQL7 H7 MDA31
R8401 N9 VDD N9 VDD
4K99R2F-L-GP DQU0 D7 MDA4 DQU0 D7 MDA15
C 21 A8 VDDQ DQU1 C3 MDA3 A8 VDDQ DQU1 C3 MDA9 C
+1.5V_RUN_GPU C8423 A1 VDDQ DQU2 C8 MDA0 A1 VDDQ DQU2 C8 MDA8
C1 VDDQ DQU3 C2 MDA1 C1 VDDQ DQU3 C2 MDA12
SCD1U10V2KX-5GP C9 VDDQ DQU4 A7 MDA2 RDQSA0 83 C9 VDDQ DQU4 A7 MDA10 RDQSA1 83
D2 VDDQ DQU5 A2 MDA6 WDQSA0 83 D2 VDDQ DQU5 A2 MDA13 WDQSA1 83
E9 VDDQ DQU6 B8 MDA5 E9 VDDQ DQU6 B8 MDA11
F1 VDDQ DQU7 A3 MDA7 RDQSA2 83 F1 VDDQ DQU7 A3 MDA14 RDQSA3 83
H9 VDDQ WDQSA2 83 H9 VDDQ WDQSA3 83
H2 VDDQ DQSU C7 RDQSA0 H2 VDDQ DQSU C7 RDQSA1
DQSU# B7 WDQSA0 ODTA0 83 DQSU# B7 WDQSA1 ODTA0 83
VREF=0.75V H1 VREFDQ VREFDQ_0_2 H1 VREFDQ
M8 VREFCA DQSL F3 RDQSA2 VREFCA_0_2 M8 VREFCA DQSL F3 RDQSA3
VREFCA_0_2 L8 ZQ DQSL# G3 WDQSA2 L8 ZQ DQSL# G3 WDQSA3

21 ZQ_0_2 ODT K1 ODTA0 ZQ_1_3 ODT K1 ODTA0
R8408
MAA0 N3 A0 CS# L2 CSA0_0# CSA0_0# 83 21 MAA0 N3 A0 CS# L2 CSA0_0# CSA0_0# 83
4K99R2F-L-GP MAA1 P7 A1 RESET# T2 MEM_RST R8410 MAA1 P7 A1 RESET# T2 MEM_RST
21 MAA2 P3 A2 MEM_RST 83,85 MAA2 P3 A2 MEM_RST 83,85
C8425 MAA3 N2 A3 243R2F-2-GP MAA3 N2 A3
MAA4 P8 A4 MAA4 P8 A4
SCD1U10V2KX-5GP MAA5 P2 A5 MAA5 P2 A5
21 MAA6 R8 A6 MAA6 R8 A6
R8407 MAA7 R2 A7 MAA7 R2 A7
MAA8 T8 A8 MAA8 T8 A8
243R2F-2-GP MAA9 R3 A9 MAA9 R3 A9
MAA10 L7 A10/AP MAA10 L7 A10/AP
MAA11 R7 A11 NC#T7 T7 MAA11 R7 A11 NC#T7 T7
MAA12 N7 A12/BC# NC#L9 L9 MAA12 N7 A12/BC# NC#L9 L9
MAA13 T3 A13 NC#L1 L1 MAA13 T3 A13 NC#L1 L1
M7 NC#M7 NC#J9 J9 M7 NC#M7 NC#J9 J9
NC#J1 J1 NC#J1 J1

83,85 MAA[0..12] VSS J8 83,85 MAA[0..12] VSS J8 B
83,85 MAA13 VSS M1 83,85 MAA13 VSS M1
B VSS M9 VSS M9
VSS J2 VSS J2
83,85 BA0 BA0 M2 BA0 VSS P9 83,85 BA0 BA0 M2 BA0 VSS P9
83,85 BA1 BA1 N8 BA1 VSS G8 83,85 BA1 BA1 N8 BA1 VSS G8
83,85 BA2 BA2 M3 BA2 VSS B3 83,85 BA2 BA2 M3 BA2 VSS B3
VSS T1 VSS T1
83 CLKA0 CLKA0 J7 CK VSS A9 83 CLKA0 CLKA0 J7 CK VSS A9
83 CLKA0# CLKA0# K7 CK# VSS T9 83 CLKA0# CLKA0# K7 CK# VSS T9
VSS E1 VSS E1
83 CKEA0 CKEA0 K9 CKE VSS P1 83 CKEA0 CKEA0 K9 CKE VSS P1

VSSQ G1 83 DQMA#[0..3] VSSQ G1
VSSQ F9 VSSQ F9
83 DQMA#0 DQMA#0 D3 DMU VSSQ E8 83 DQMA#1 DQMA#1 D3 DMU VSSQ E8
83 DQMA#2 DQMA#2 E7 DML VSSQ E2 83 DQMA#3 DQMA#3 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
83 WEA0# WEA0# L3 W E# VSSQ D1 83 WEA0# WEA0# L3 W E# VSSQ D1
83 CASA0# CASA0# K3 CAS# VSSQ B9 83 CASA0# CASA0# K3 CAS# VSSQ B9
83 RASA0# RASA0# J3 RAS# VSSQ B1 83 RASA0# RASA0# J3 RAS# VSSQ B1
VSSQ G9 VSSQ G9

K4W1G1646E-HC12-GP K4W1G1646E-HC12-GP

CLKA0 R8411
1 2 CLKA0_GND
A 56R2J-4-GP DISCRETE PARK A
5
CLKA0# R8412 21 C8427 Wistron Corporation
12 SCD01U16V2KX-3GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
56R2J-4-GP
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM (1/2) Rev

Size Document Number A01

Custom Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 84 of 92

43 21

5 4 321

SSID = VIDEO

Place blow decouping caps close VDD pin. Place blow decouping caps close VDD pin.

+1.5V_RUN_GPU +1.5V_RUN_GPU

C8501 DY
D SC1U6D3V2KX-GP C8512 D
SC1U6D3V2KX-GP
21
C8502 21
C8513
SC1U6D3V2KX-GP
21 SC1U6D3V2KX-GP
C8503 21
C8514
SCD1U10V2KX-5GP
21 SCD1U10V2KX-5GP
C8504 21
C8515
SC1U6D3V2KX-GP
21 SC1U6D3V2KX-GP
C8505 21
C8516
SC1U6D3V2KX-GP
21 SC1U6D3V2KX-GP
C8506 21
C8517
SC1U6D3V2KX-GP
21 SC1U6D3V2KX-GP
C8507 21
C8518
SCD1U10V2KX-5GP
21 SC1U6D3V2KX-GP
C8508 21
C8519
SCD1U10V2KX-5GP
21 SC1U6D3V2KX-GP
C8509 21
C8520
SC10U6D3V5MX-3GP
21 SC10U6D3V5MX-3GP
C8510 21
C8521
SC10U6D3V5MX-3GP
21 SC10U6D3V5MX-3GP
C8511 21
C8522
SC10U6D3V5MX-3GP Do Not Stuff
21 21

+1.5V_RUN_GPU +1.5V_RUN_GPU 83,84 MDA[0..63] MDA[0..63] +1.5V_RUN_GPU
U8501 83 RDQSA[4..7] U8502
83 WDQSA[4..7]
21 VREF=0.75V K8 VDD DQL0 E3 MDA38 K8 VDD DQL0 E3 MDA45
R8501 VREFDQ_4_6 K2 VDD DQL1 F7 MDA33 K2 VDD DQL1 F7 MDA47
N1 VDD DQL2 F2 MDA39 N1 VDD DQL2 F2 MDA46
4K99R2F-L-GP R9 VDD DQL3 F8 MDA37 R9 VDD DQL3 F8 MDA43
B2 VDD DQL4 H3 MDA32 B2 VDD DQL4 H3 MDA40
21 D9 VDD DQL5 H8 MDA36 D9 VDD DQL5 H8 MDA44
R8505 G7 VDD DQL6 G2 MDA35 G7 VDD DQL6 G2 MDA42
R1 VDD DQL7 H7 MDA34 R1 VDD DQL7 H7 MDA41
4K99R2F-L-GP N9 VDD N9 VDD
21 DQU0 D7 MDA50 DQU0 D7 MDA56
C R8502 A8 VDDQ DQU1 C3 MDA52 A8 VDDQ DQU1 C3 MDA58 C
+1.5V_RUN_GPU 4K99R2F-L-GP A1 VDDQ DQU2 C8 MDA51 A1 VDDQ DQU2 C8 MDA57
21 C1 VDDQ DQU3 C2 MDA49 C1 VDDQ DQU3 C2 MDA62
C8523 C9 VDDQ DQU4 A7 MDA54 RDQSA6 83 C9 VDDQ DQU4 A7 MDA59 RDQSA7 83
D2 VDDQ DQU5 A2 MDA53 WDQSA6 83 D2 VDDQ DQU5 A2 MDA61 WDQSA7 83
SCD1U10V2KX-5GP E9 VDDQ DQU6 B8 MDA55 E9 VDDQ DQU6 B8 MDA63
F1 VDDQ DQU7 A3 MDA48 RDQSA4 83 F1 VDDQ DQU7 A3 MDA60 RDQSA5 83
H9 VDDQ WDQSA4 83 H9 VDDQ WDQSA5 83
H2 VDDQ DQSU C7 RDQSA6 H2 VDDQ DQSU C7 RDQSA7
DQSU# B7 WDQSA6 ODTA1 83 DQSU# B7 WDQSA7 ODTA1 83
VREF=0.75V H1 VREFDQ VREFDQ_4_6 H1 VREFDQ
M8 VREFCA DQSL F3 RDQSA4 VREFCA_4_6 M8 VREFCA DQSL F3 RDQSA5
VREFCA_4_6 L8 ZQ DQSL# G3 WDQSA4 L8 ZQ DQSL# G3 WDQSA5
ZQ_5_7
21 ZQ_4_6 ODT K1 ODTA1 ODT K1 ODTA1
R8507
MAA0 N3 A0 CS# L2 CSA1_0# CSA1_0# 83 21 MAA0 N3 A0 CS# L2 CSA1_0# CSA1_0# 83
4K99R2F-L-GP MAA1 P7 A1 RESET# T2 MEM_RST R8510 MAA1 P7 A1 RESET# T2 MEM_RST
21 MAA2 P3 A2 MEM_RST 83,84 MAA2 P3 A2 MEM_RST 83,84
C8525 MAA3 N2 A3 243R2F-2-GP MAA3 N2 A3
MAA4 P8 A4 MAA4 P8 A4
SCD1U10V2KX-5GP MAA5 P2 A5 T7 MAA5 P2 A5 T7
21 MAA6 R8 A6 L9 MAA6 R8 A6 L9
R8508 MAA7 R2 A7 L1 MAA7 R2 A7 L1
MAA8 T8 A8 J9 MAA8 T8 A8 J9
243R2F-2-GP MAA9 R3 A9 J1 MAA9 R3 A9 J1
MAA10 L7 A10/AP MAA10 L7 A10/AP
MAA11 R7 A11 NC#T7 MAA11 R7 A11 NC#T7
MAA12 N7 A12/BC# NC#L9 MAA12 N7 A12/BC# NC#L9
MAA13 T3 A13 NC#L1 MAA13 T3 A13 NC#L1
M7 NC#M7 NC#J9 M7 NC#M7 NC#J9
NC#J1 NC#J1

83,84 MAA[0..12] VSS J8 83,84 MAA[0..12] VSS J8 B
83,84 MAA13 VSS M1 83,84 MAA13 VSS M1
VSS M9 VSS M9
B VSS J2 VSS J2
VSS P9 VSS P9
83,84 BA0 BA0 M2 BA0 VSS G8 83,84 BA0 BA0 M2 BA0 VSS G8
83,84 BA1 BA1 N8 BA1 VSS B3 83,84 BA1 BA1 N8 BA1 VSS B3
83,84 BA2 BA2 M3 BA2 VSS T1 83,84 BA2 BA2 M3 BA2 VSS T1
VSS A9 VSS A9
83 CLKA1 CLKA1 J7 CK VSS T9 83 CLKA1 CLKA1 J7 CK VSS T9
83 CLKA1# CLKA1# K7 CK# VSS E1 83 CLKA1# CLKA1# K7 CK# VSS E1
VSS P1 VSS P1
83 CKEA1 CKEA1 K9 CKE 83 DQMA#[4..7] 83 CKEA1 CKEA1 K9 CKE
VSSQ G1 VSSQ G1
83 DQMA#6 DQMA#6 D3 DMU VSSQ F9 83 DQMA#7 DQMA#7 D3 DMU VSSQ F9
83 DQMA#4 DQMA#4 E7 DML VSSQ E8 83 DQMA#5 DQMA#5 E7 DML VSSQ E8
VSSQ E2 VSSQ E2
83 WEA1# WEA1# L3 W E# VSSQ D8 83 WEA1# WEA1# L3 W E# VSSQ D8
83 CASA1# CASA1# K3 CAS# VSSQ D1 83 CASA1# CASA1# K3 CAS# VSSQ D1
83 RASA1# RASA1# J3 RAS# VSSQ B9 83 RASA1# RASA1# J3 RAS# VSSQ B9
VSSQ B1 VSSQ B1
VSSQ G9 VSSQ G9

K4W1G1646E-HC12-GP K4W1G1646E-HC12-GP

CLKA1 R8511
1 2 CLKA1_GND
A 56R2J-4-GP DISCRETE PARK A
5
CLKA1# R8512 21 C8527 Wistron Corporation
12 SCD01U16V2KX-3GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
56R2J-4-GP
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM (2/2)
Size Document Number Rev

Custom Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 85 of 92

43 21

543 2 1

SSID = Video.PWR.Regulator RT8208BGQW for +VGA_CORE

D D
+PW R_SRC C
B
A00 10.03.18 21
PC8918
+5V_RUN 45 SC10U25V6KX-1GP
36 21
PU8603 27 DS PC8916 Vout=0.75V*(R1+R2)/R2
SI7686DP-T1-GP 18 DS SC10U25V6KX-1GP
DS 21
PU8604 DG PC8914
SC10U25V6KX-1GP
21
PC8903
SC10U25V6KX-1GP
21

PC8911
SCD1U25V2KX-GP

PC8908 21 +GFX_CORE_TON PR8910 Design Current =11.14A
12 12.25A<OCP< 18.9A

SC1U10V2KX-1GP 249KR2F-GP

PU8601 PR8902

PC8906 +VCC_GFX_CORE

PR8903 16 TON BOOT 13 +GFX_CORE_BOO2T 1+GFX_CORE_BOOT_1C 2 PL8601 A00 10.03.16 PTC8902
9 VDDP
21 UGATE 12 1R3J-L1-GP
10R2F-L-GP PHASE 11
LGATE 8 +GFX_CORE_UGATE SCD1U25V3KX-GP

+GFX_CORE_VDD 2 VDD +GFX_CORE_PHASE 12
IND-2D2UH-157-GP-U
+GFX_CORE_LGATE 1
PR8607
A00 10.03.16 A00 10.03.18 Do Not Stuff 21 21
PG8920
49,50,51,88 RUNPW ROK 1 4 PGOOD G0 7 +GFX_CORE_FB PWRCNTL_0 81 45 SIR460DP-T1-GE3-GP DY Do Not Stuff SE220U2VDM-8GP
C PR8905 2+GFX_CORE_CS 10 CS FB 3 PWRCNTL_1 81 36
8K45R2F-2-GP G1 14 PW RCNTL_1# 27 DS 1
PC8904 D1 5 PW RCNTL_0# 18 DS Do Not Stuff
21 +GFX_CORE_EN_R 15 EM/DEM D0 6 DS 1VGA_CORE_DIV 2
DG 1
SC1U10V2KX-1GP 17 GND VOUT 1 +GFX_CORE_VOUT Do Not Stuff
21
PC8915
SCD1U10V2KX-4GP

RT8208BGQW -GP DY DY

RT8208B:74.08208.A73 Do Not Stuff PR8608 +GFX_CORE_VOUT 21
2
DY PR8908
10KR2F-2-GP PC8917
2
2
PC8913

37 GFX_CORE_EN 1 2 +GFX_CORE_EN_R
22,37,42,50,51 PM_SLP_S3# PR8921 Do Not Stuff

DYPR8920 1 2 Do Not Stuff

21 +GFX_CORE_FB

PC8912 21
SCD1U10V2KX-4GP 21
21
B PR8909 PR8911 PR8912
150KR2F-L-GP 49K9R2F-L-GP 49K9R2F-L-GP

PWRCNTL_0# PWRCNTL_1#

M92-LP Power-Play PARK-LP Power-Play

PWRCNTL_0 PWRCNTL_1 +VGA_CORE PWRCNTL_0 PWRCNTL_1 +VGA_CORE
H H 0.9V H H 0.9V
L H 0.95V L H 0.95V
H L 1.05V H L 1.05V
L L 1.1V L L 1.1V

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L DISCRETE PARK A
A Inductor: 2.2uH PCMC063T-2R2MN Cyntec DCR:18mohm/201mohm Isat=14Arms 68.2R210.20B
Wistron Corporation
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 2.7Arms PANASONIC/ 79.22719.20L2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: SI7686DP/ POWERPAK-8/11mOhm/[email protected]/ 84.07686.037 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/[email protected]/ 84.00460.037
Taipei Hsien 221, Taiwan, R.O.C.
543
Title

RT8208B_+VGA_CORE

Size Document Number Rev

A3 Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 86 of 92

21

5 4 32 1
D
M92/ PARK switch Peak current: 2805mA
Design current: 1963.5mA
+1.5V_RUN_GPU
D2 1 +1.1V_RUN +1.05V_VTT
M92R4215
Do Not Stuff D

R4214 2 PARK10R3J-0-U-GP
R4216 2 PARK10R3J-0-U-GP

. Q4206
Do Not Stuff
.M9...2

G
S

RUN_ON_1.5V#

C M92/ PARK switch C

R4212 Peak current:3520mA
Design current: 2464mA
1 PARK2
11.6A
0R3J-0-U-GP Rds=14m ohm ==> 0.04928

For Discrete +1.5V_RUN

Q4204 +3.3V_RTC_LDO

Do Not Stuff Do Not Stuff
R4206
+1.5V_RUN +1.5V_RUN_GPU
M921 2 RUN_ON_1.5V#
+3.3V_RUN S M92 D +3.3V_DELAY +15V_ALW A00 10.03.29 change
DG
R4211 M9221 S M92R4208 to 0805
Do Not Stuff
Do Not Stuff 21 G Id: 2A 1 PARK2
Rds: 0.15ohm 16 R8701 1 PARK2 0R5J-5-GP
Q4203 25 R8702 0R5J-5-GP
Do Not Stuff M92 34
3.3V_ALW_1 12
21U4202
21
C4208 8D S 1
Do Not Stuff 7D M92SS 2
B 21 SGD 6D 3 B
4
DY R4218 5D G

Do Not Stuff R4209 Do Not Stuff C4203
SC10U6D3V5KX-1GP
A00 10.03.15 37 1.5V_RUN_EN M922 1 1.5V_RUN_ENABLE

3.3V_ALW _1_R R4217 Do Not Stuff

DGS 39,42 RUN_ENABLE 2 DY 1 M92C4204
Do Not Stuff
Do Not Stuff
16 Q4205 21
M92 25 Do Not Stuff R4213
34
M92Do Not Stuff

SGD

3.3V_DELAY_1

37 3.3V_DELAY_EN

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane +1.05V_GFX

Size Document Number Rev

A3 Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 87 of 92

54 321

5 4 3 2 1
D
APL5930KAI for +1.1V_RUN C
B
D

+5V_ALW +1.5V_SUS

Do Not Stuff
Do Not Stuff
PC9008 21 21 PC9010
21
Do Not Stuff M92 PC9009

M92 M92

+1.1V_RUN
Design Current: 1.963A

PU9002 VCNTL 6

+1.1V_RUN

49,50,51,86 RUNPWROK 7 POK VIN#5 5
PR9007 VIN#9 9

37 1.1V_RUN_EN 1 21.1V_RUN_VGA_EN_C 8 EN VOUT#3 3
4
A00 10.03.15 Do Not Stuff 21 M9V2OUT#4 Do Not Stuff
Do Not Stuff 2 Do Not Stuff
R9012
21 Do Not Stuff
Do Not Stuff M92 PC9011 1 GND FB PR900921 PC9012 PC9013 M9P2C9014
21
M92 M92 M92 M92
Do Not Stuff
Do Not Stuff 21
21
SO-8-P

C

5930_1.0VRUN_FB

Vout=0.8V*(R1+R2)/R2 21 PR9011

M9D2o Not Stuff

B

AA

DISCRETE PARK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

APL5930_+1.1V_RUN

Size Document Number Rev

C Arsenal DJ1 Discrete A01

Date: Thursday, May 06, 2010 Sheet 88 of 92

54321

5 4 3 2 1

Item Page# Date Request By Issue description Solution Description Rev.

1 47 2010/01/04 Wistron CPU core power was two phase Remove PC4766

ADD RN8102,R8104,R8105,R8201,L8202,L8212,C8203 X01

D 81 82 2010/01/04 Wistron M92/ PARK switch R8310,R8311,R8312 D
83 2010/01/04 ATI Modify Park to Normal mode Connect Ball L17 to +1.5V_RUN_GPUand Ball L16 to GND
2
3 81 X01
4
PD R8132 to GND X01
5
87 2010/01/04 Wistron Derect connect +1.5V_RUN to +1.5V_RUN_GPU. Change +1.5V_SUS power rail to +1.5V_RUN
C
ADD R8701,R8702 NOPOP U4202,C4203,C4204,R4209,R4208 X01
Q4203,R4215,Q4206

2010/01/04 Wistron BOM Control PARK:POP R8003,RN8102,R8104,R8105,C8134,C8135,C8136 X01
C8128,C8129,C8130,L8108,L8109,C8131,C8132,C8133

L8107,C82127,C82129,C82125,C82130,L8213,L8214

80 81 R8209,L8211,R8313,C8306,C8307,R8332,R8333,R8308
82 83
84 ,R8304,R8305,R8307,R4212 C

M92:POP R82011,C8203,L8202,L8212,R8310,R8311,R8312
R4211,R4213,Q4204,Q4205

6 37 62 2010/01/05 Wistron Improve BIOS data loss issue. ADD U3702 circuit POP R6210 NOPOP R6203 X01
7 87 88 2010/01/05 Wistron M92/Park Co-lay to use 1.1V_RUN LDO.
8 ADD PU9002 LDO circuit Remove U8703 MOSFET circuit X01
59
B9 2010/01/06 Wistron Suyin ODD connect PT build SMT issue Change to 22.10300.811 X01
7 46
10 60 79 Pop EC7932,EC7960,EC7933,EC7928,EC7931,EC7929,EC7901X01
11 86
12 2010/01/06 Wistron EMI requirement ,EC7926,PC8911,PC4610,EC7927,EC7962,EC7955,PC4616, B
13 62
14 EC7956,EC7923,EC7921,EC7902,PC4619,EC6001,EC6002,
24
A EC6003,EC6004,EC703
39
37 2010/01/07 Wistron Change RTC battery connect drawing from Coxoc Change to 62.70001.011 X01
to Foxconn by SMT issue X01
37
2010/01/07 Wistron Schematic could not PD this pin Packege ball name:AY3 NC

2010/02/24 Wistron T8 shutdown is set 88 deg-C. Change R3915 to 64.28015.6DL A00
2010/02/24 Wistron Change MB VERSION ID and GPU table
Power bottom delay issue POP R3723,R3722 NOPOP R3725 Remove R3724,R3727 A00

2010/02/24 Wistron 43 NOPOP Reset IC U3702 A00

2 DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete 92

Date: Thursday, May 06, 2010 Sheet 89 of
1
5

5 4 3 2 1

Item Page# Date Request By Issue description Solution Description Rev.

15 32 54 2010/03/09 Wistron EMI requirement ADD TR3201,TR5401 A00
16 79 2010/03/09 Wistron ME requirement Remove HBT1
A00
D 09 2010/03/09 Wistron S3 Power Reduction requirement POP U927,R2114,R977 NOPOP R978
D
17 09 2010/03/09 Wistron DDR3_DRAMRST# drop issue ADD C903
18 A00
19 79 2010/03/09 Wistron Change page83 DIVIDER RESISTORS table A00
20 A00
21 37 2010/03/15 Wistron Support RCID function schematic when pop Q3706 ADD Q3706 A00
22 A00
C 23 46 2010/03/15 Wistron Operation Mode Select to Diode Emulation Mode POP PR4619 NOPOP PR4618

24 79 2010/03/15 Wistron EMI requirement Reserve Pad C7901,C7902,C7903 A00
2010/05/03
25
54 2010/03/15 Wistron LCD VDD power ADD C5412 ,change C5410 from 0.1uf to 1uf A00 C
B A00
46 47 2010/03/16 Wistron Change 0 ohm to short pad R2114,R4218,PR4620,PR4616,PR4619,PR4706, PR4708,
26 50 88 PR4713, PR4718, PR4722,PR4732, PR4738, PR4744, A00
PR4755, PR4764, PR4704,PR4703, PR4707, PR4711,
27 PR4784,PR4790, PR4784,PR4776,PR5002,PR9007,R3751 B
28
29 change to 2.7Kohm for CPU_CORE load/line setting.PR4705 change to 2.7Kohm A00
A 30
31 change to 1.4Kohm for CPU_CORE OCP setting. PR4727 change to 1.4Kohm

47 49 2010/03/16 Wistron change to 1ohm for boost resister. PR4901 change to 1ohm
50 89
change to 73.2Kohm for 1.05V OCP setting. PR4902 change to 73.2Kohm

change to 8.2Kohm for 1.5V OCP setting. PR5007 change to 8.2Kohm .

change to 8.45Kohm for VGA_CORE OCP setting. PR8905 change to 8.45Kohm

46 48 2010/03/16 Wistron Power requirement Change PL4814,PL4817 from 68.R3610.10M to
49 50 68.R3610.10T
86 Change PL4602 from 68.2R21B.10A to 68.2R210.20Q
Change PL8601 from 68.2R210.20B to 68.2R210.20Q
Change PL4601 from 68.3R31A.10W to 68.3R310.20I
Change PTC4602 from 77.23371.12L to 77.C2271.00L
Change from 68.R5610.10D to 68.R5610.20I
Change PL5001 from 68.1R510.10J to 68.1R510.20I

63 2010/03/17 Wistron USB Enable pin signal issue remove UPI vendor Change U6302,U6301 to GMT symbo A00
42 2010/03/17 Wistron Change symbo from VISHAY to AOL Modify U4204 A00
Power requirement Change PQ4840 PQ4833 PU4902 PU5003 A00
48 49 2010/03/18 Wistron from 84.07686.A37 to 84.07686.037
50 PSE issue,Layout routing
2010/03/24 Wistron XDP1 change to ZZ.00PAD.Q81 Remove C1219,C1211,C1803,C1804, A00
12 18 2010/03/25 Wistron C1809,C1905,C1911,C1912DISCRETE PARK A
19 43
Wistron Corporation
09
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 90 of 92

5 21

5 4 3 21

Item Page# Date Request By Issue description Solution Description Rev.

POP C7901,C7902,C7903,C7904,C7905,R7901,R7902,R7903,

32 79 2010/05/03 Wistron EMI requirement R7904,R7905,R7906,R7910 A01

D D

CC

BB

A DISCRETE PARK A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History Rev

Size Document Number A01

A3 Arsenal DJ1 Discrete

Date: Thursday, May 06, 2010 Sheet 91 of 92

54321

54 32 1

DJ1 Calpella Discrete-Power Up Sequence

(AC mode) red word: KBC GPIO (DC mode) red word: KBC GPIO

+RTC_VCC T1 +RTC_VCC T1
PCH_RTCRST# PCH_RTCRST#

+PWR_SRC T2 +PWR_SRC T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3
KBC GPIO36 control
Press Power button
D S5_ENABLE KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3 D
T4 C
+KBC_PWR B
+5V_ALW T5 S5_ENABLE T3 EC_ENABLE# (GPIO51) keep low
+5V_ALW T4 KBC GPIO36 control
+3.3V_ALW +3.3V_ALW
T5

+15V_ALW T6 T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
SUS_PWR_DN_ACK T7 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) PCH to KBC GPI94
PCH_SUSCLK_KBC T8 +15V_ALW T7 TPS51125 to KBC GPIO46
AC_PRESENT_EC T9 KBC GPIO43 to PCH 3V_5V_POK T8
PCH to KBC GPIO00 PM_PWRBTN#
>10ms SUS_PWR_DN_ACK T9
PCH_RSMRST# T10
T10 PCH_SUSCLK_KBC

DC PCH_RSMRST# KBC GPO84 to PCH
T13
T11 <200ms PCH to KBC GPI94
PM_SLP_S4#
PM_SLP_S3# T11 >10ms KBC GPIO43 to PCH
PM_LAN_ENABLE T12 PCH to KBC GPIO01
Press Power button +3.3V_LAN
AC KBC_PWRBTN_EC# T12 KBC_PWRBTN_EC# GPIO3 +1.5V_SUS
AC PM_PWRBTN# KBC GPO84 to PCH +V_DDR_REF(0.9V)
+5V_RUN
AC PM_PWRBTN# +3.3V_RUN T14
T13 >30us

PM_SLP_S4# T14 T15 KBC GPO16 to LAN
T16 +5V_RUN & +3.3V_RUN need meet 0.7V difference
PM_SLP_S3# >30us T15
T17
C KBC GPO16 to LAN T18

PM_LAN_ENABLE T16 T19
T20
+3.3V_LAN

+1.5V_SUS T17

+V_DDR_REF(0.9V) T18 +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T19

+3.3V_RUN T20 +1.5V_RUN T21
+1.8V_RUN T22
+1.5V_RUN T21 T24 KBC GPIO71 to RT8208B GFX_CORE_EN------Delay 5ms KBC GPIO71 to RT8208B
+1.8V_RUN T22 T26 KBC GPIO30 to APL5930 +VCC_GFX_CORE T23 KBC GPIO30 to APL5930
GFX_CORE_EN------Delay 5ms T28 KBC GPIO66 to APL5930 1.1V_RUN_EN------Delay 4ms T24 KBC GPIO66 to APL5930
+VCC_GFX_CORE T23 +1.1V_RUN
1.1V_RUN_EN------Delay 4ms +1.8V_DELAY_EN------Delay 5ms T25
+1.1V_RUN T25 +1.8V_DELAY T26
+1.8V_DELAY_EN------Delay 5ms
+1.8V_DELAY T27 T27
T28

RUNPWROK T29 RUNPWROK T29
+1.05V_VTT T30
+1.05V_VTT T30 TPS51218 to KBC GPI34 VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction) T31 TPS51218 to KBC GPI34
T31 +0.75V_DDR_VTT T32
B H_VTTPWRGD
T33
VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)

+0.75V_DDR_VTT T32

H_VTTPWRGD T33

VTT_PWRGD T34 ( >99ms ) KBC GPO53 to ISL62883
IMVP_VR_ON
VTT_PWRGD T34 ( >99ms ) KBC GPO53 to ISL62883 +VCC_CORE T35 CPU CORE Power
IMVP_VR_ON CLK_CPU_BCLK <3m s
+VCC_CORE
CLK_CPU_BCLK T35 CPU CORE Power CK_PWRGD CLKIN_BCLK(from CK505) stable
<3m s IMVP_PWRGD 36 >1ms
CK_PWRGD
IMVP_PWRGD CLKIN_BCLK(from CK505) stable ISL62883 to CLOCKGEN T37 >1ms ISL62883 to CLOCKGEN
T36 >1ms ISL62884 to KBC GPO14 T38 ISL62884 to KBC GPO14
PM_PWROK
T37 >1ms KBC GPIO47 to PCH Delay 10ms KBC GPIO47 to PCH
T38
PM_PWROK 3ms< T39 <20ms
Delay 10ms

3ms< T39 <20ms

A A

+VCC_CORE 0.05ms< T40 <650ms

+VCC_CORE 0.05ms< T40 <650ms H_PWRGD T41 KBC LRESET#
PLT_RST# >1m s T42 KBC GPIO45
PLTRST_DELAY#
H_PWRGD H_CPURST# T43 DISCRETE PARK
PLT_RST#
PLTRST_DELAY# T41 KBC LRESET# 3 Wistron Corporation
H_CPURST# >1m s T42 KBC GPIO45
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5 T43
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence

Size Document Number Rev

A1 DJ1 Calpella Discrete A01

Date: Thursday, May 06, 2010 Sheet 92 of 92

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