CHAPTER 5
COMBINATIONAL LOGIC
LEARNING OUTCOMES
After completing the unit, students should be able to:
1. Utilize Boolean algebra laws and rules for simplifying
combinational logic circuits.
2. Distinguish between half adder and full adder.
3. Implement a basic binary encoder
4. Understand and explain the function of encoder, decoder and
comparator
5. Identify the function of multiplexer and de-multiplexer.
5.1 BASIC COMBINATIONAL LOGIC CIRCUITS &
IMPLEMENTATION
• Cbaosmicbilnoagticiognaatlelsogtoicfeomrmplaoyms otrhee uusseefuolf, tcwoomoprlemxofruencotfiothne. This equation can be stated as B is HIGH if K
• Fitourseexsacmopmleb,inianttiohneadl elosigginc.of an automobile warning buzzer, and D are HIGH or if H and D are HIGH.
• ftTaohnhledelodtcwhrrisievt:eedtrrho’isoeonrdboifusoozorrzpetisehrneoaepcadetc.intveiavdta,etsioorinfiftohftehtehheekaewdyaliirgsnhiinntsgtahbreueziOzgenNritaiisonndas
• BTciloohlumoesltbelroiaangntaiectedifqousunnyamocttfiboiolononlgiicnifcoatrlfhluytenhicefnotaifroimugntusormteho5ab.t1ilc.eaTnwhaberenfiwignurgirtebteuinlzlzuaessrtraiastes a Key in Ignition K
• B = ( K and D ) or ( H and D ) Door Opened D
Headlights on H
• which can also be written as
Door Opened D
• B = KD + HD
Figure 5.1: An example of the application of
combinational logic – automobile warning
buzzer
CONTINUE
• Closely looking at the system, this warning Door Opened D Warning Buzzer
buzzer can also be activated whenever the Headlights on H
door is opened and either the key is in the K
ignition or the headlights are on. This is a Key in Ignition D
simplification method for Boolean algebra.
• The new Boolean equation becomes B = D and
( K = H ) also written as B = D (K +H).
• The new equation represents the same logic
operation but is simplified implementation.
Because it requires only two logic gates as
shown in figure 5.2.
Example 5.1 :
• Write the Boolean logic function and draw the logic circuit that
represent the following function:
• A bank burglar alarm (A) is to activate if it is after banking hours (H)
and the front door (F) is opened or if it is after banking hours (H) and
the vault door is opened (V).
Solution :
• A= HF + HV. The logic circuit is shown below
Key in Ignition H
Front Door Opened F
After Hours H
Vault Door Opened V
Example 5.2 :
• Using common reasoning, reduce the logic function described in
Example 5-1 to a simpler form.
Solution :
The alarm is activated if it is after banking hours and if either the front door is
opened or the vault is opened (see below). The simpler equation is written as
A = H (F+ V)
After Hours H Warning Buzzer
Front Door Opened F
Vault Door Opened V
5.2 BASIC ADDER
• Computer executes adding operation on two binary numbers only
at a time. Every number consist a few bits. Adding operation
starts from LSB to MSB. In some cases, ‘Carry’ is produced.
• There are 3 types of adder circuit
1. Half adder
2. Full adder
3. RIPPLE CARRY ADDER / PARALLER
5.2.1 HALF ADDER
5.2.2 FULL ADDER
5.2.3 RIPPER CARRY ADDER
UNIT 5 :COMBINATIONAL LOGIC
COMPARATORS
Learning Outcome
At the end of the class student should be
able to:-
Understand and explain the function of
comparator
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COMPARATOR
Basic function
To compare the magnitude of two binary
quantities to determine the relationship
of those quantities.
Comparator determines whether two
numbers are equal or unequal.
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COMPARATOR - equality
EX-OR gate can be used as a 2-bit
comparator. Why?
Because o/p is HIGH if two i/p are not equal
& o/p is LOW if i/p are equal.
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COMPARATOR- equality
To compare binary numbers containing
two bits each:
LSB are compared by gate G1
MSB are compared by gate G2
If number equal, o/p is HIGH & if number
not equal, o/p is LOW.
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COMPARATOR - equality
Remember!!!
Equality – o/p is 1
Inequality – o/p is 0
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COMPARATOR - equality
Example:
Determine the output by applying the
following sets of binary numbers to the
comparator.
a) 10 and 10
b) 11 and 10
Answer:
a) Output is 1 which is equal
b) Output is 0 which is not equal
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COMPARATOR - inequality
Many IC comparators provide additional
outputs that indicate which of the two
binary numbers being compared is the
larger.
Comparison is made in terms of :
◦ Equal to ‘=’
◦ Less than ‘<’
◦ Greater than ‘>’
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COMPARATOR - inequality
If number A is greater than number B
(A > B )
If number A is less than number B
(A < B )
If number A equal to number B
(A = B )
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COMPARATOR - inequality
Equal to ‘=’
For two 1-bit quantities For two 2-bit quantities For two n-bit quantities
An-1 COMP
A B OA=B A1 COMP
00 1 A0 A0 OA=B
01 0 Bn-1
10 0 OA=B
11 1 BB01 B0
COMP
A OA=B
B
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COMPARATOR - inequality
Inputs Outputs
A B A<B A=B A>B
00 0 1 0
01 1 0 0
10 0 0 1
11 0 1 0
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COMPARATOR - inequality
Logic symbol for a 4 bit comparator.
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COMPARATOR - inequality
To determine an inequality of binary
numbers A and B, you first
examine the highest-order bit in
each number:
◦ If A3=1 and B3=0 number A is
greater than number B
◦ If A3=0 and B3=1 number A is
less than number B
◦ If A3=B3 you must examine the
next lower bit position for an
equality
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COMPARATOR - inequality
Remember !!!!!!
Please start with
highest-order bits
(MSBs)
When any inequality found, the relationship of
the two numbers is established and any
inequalities in lower-order bit positions
must ignored.
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COMPARATOR - inequality
Example:
Determine the A=B ,A>B & A<B o/p for
the i/p given.
0
1
1
0
1
1
0
0
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COMPARATOR - inequality
Answer :
0
1
11
0
0
1
10
0
0
A > B output is HIGH and other outputs are
LOW
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COMPARATOR - inequality
A 4-bit magnitude comparator ( 74HC85 )
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COMPARATOR - inequality
Any differences ?????
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COMPARATOR - inequality
Cascading inputs allow several comp to be
cascaded of any number of bits greater than
four.
Output of lower-order comp are
connected to the cascading inputs of next
higher-order comparator.
The lowest-order comparator must have
high on the A=B input and LOW on the
A<B and A>B inputs.
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COMPARATOR - inequality
How to connect two 74HC85
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ありがとう
ございました
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UNIT 5 :COMBINATIONAL LOGIC
DECODERS &
ENCODERS
Learning Outcome
At the end of this class, students
should be able to :
Implement a basic binary encoder.
Understand and explain the function
of encoder & decoder.
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MEDIUM SCALE INTEGRATION
(MSI) LOGIC CIRCUIT
Digital systems get binary-coded data and
information in the many ways.The
operation of getting the data include:
Decoding and Encoding
Multiplexing
Demultiplexing
Code conversion
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Decoders
Circuit that
◦ accepts a set of inputs (binary number/code)
and activates only the output that
corresponds to that particular input number.
◦ Only one output is activated at one time,
correspond to the input number.All other
outputs remain inactive.
◦ Has n i/p line and from one to 2n o/p line.
◦ Active-HIGH or Active-LOW input and
output.
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Decoders
Basic Binary decoder
If we need binary 1001 on the input.AND
gate can be used because only HIGH output
will produce when all input is HIGH.
X=A3 A2 A1 A0
Logic equation for the decoder of figure above
is X=A3 A2 A1 A0 DFE 1013 MOHD RADZI
Decoders
Example of decoder: 3-line-to-8-line
(or 1-of-8) binary decoder.
A0 Y0
Y1
A1 1-of-8
DECODER
A2 Y6
Y7
Active-HIGH input and output.
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Decoders
Truth table for 1-of-8 Binary Decoder
A B C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
0001
001 1
010 1
011 1
100 1
101 1
110 1
11 1 1
Y0 = ABC 7
Y1 = ABC
Decoders
1-of-8 Binary Decoder logic circuit
ABC
Y0
Y1
Y6
Y7
8
Decoders
The 74138 Decoder (1-of-8 Decoder)
Enable the input pin.
E3 Y0
E2
Y1
E1 74 LS 138 Y2
Y3
Y4
A Y5
B Y6
C Y7
9
Decoders
74138 Decoder
E1 E2 E3
10
The 4-Bit Decoder
In order to decode all possible combinations
of four bits, 16 decoding gates are required
(24=16).
This type of decoder is commonly called
either:
◦ A 4-line-to-16-line decoder, or
◦ A 1-of-16 decoder
Decoding functions and truth table for a 4-
line-to-16-line decoder with active-LOW
outputs.
The 4-Bit Decoder
The 4-Bit Decoder
74HC154: 1-of-16 decoder
Decoders
The BCD-to-Decimal Decoder
The BCD-to-decimal converts BCD code
(8421 code) into one of ten possible decimal
digit indications.
Known as 4-line-to-10-line or 1-of-10
decoder.
The BCD code represents only the ten
decimal digits 0 through 9.
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Decoders
BCD to Decimal Decoder
Decimal Digit BCD CODE
A3 A2 A1 A0
0
1 0 00 0
2 0 00 1
3 0 01 0
4 0 01 1
5 0 10 0
6 0 10 1
7 0 11 0
8 0 11 1
9 1 00 0
1 00 1
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Decoders
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Decoders
BCD to 7 Segment Decoder
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