19. Show the following is covered by the control bus.A. Video output aloneB. The bus functionality (read/write and synchronization)C. Layout of the keyboardD. Speed of the internet20. Choose the following is connected by the system bus.A. CPU to memory and other elements of the systemB. Only printers to CPUC. Only keyboards to CPUD. Only storage to monitor21. Why I/O buses usually operate at a lower speed compared tosystem buses?A. I/O devices do not transfer data at the same rate as CPUsB. They are wirelessC. They only carry addressesD. They use batteries51
22. Classify the methods for data transfer.A. Wired and wirelessB. Analog and digitalC. Synchronous and asynchronousD. Input and output23. Which statement describes synchronous data transfer?A. The sender and receiver operate using different clocks.B. The sender and receiver rely on the same clock signal.C. Data transfer depends only on handshaking.D. Data is sent at random timing intervals.24. Show a key characteristic of synchronous transfer.A. Timing is unpredictableB. Uses handshaking signals onlyC. Timing is predictable and controlledD. Best suited for slow systems52
25. Identify the following is typical uses of asynchronous datatransferA. Common clock pulsesB. Initiator/receiver signalsC. Only cache memoryD. Signals for instruction registers26. Give an example of asynchronous transfer.A. Transfer from CPU to cacheB. Transfer from CPU to RAM on a memory busC. Communication from Keyboard to CPUD. Transfer from L1 to L2 cache27. Describe on how the data is sent in serial transfer.A. In multiple bits simultaneously across multiple linesB. One at a time on a single lineC. Only through RAMD. Only within the CPU53
28. Give an example of serial transfer.A. USBB. Parallel printer portC. Bus cacheD. Address bus29. Describe on how data is sent in parallel transfer.A. One bit at a timeB. More than one bit at the same time across several linesC. Only control signalsD. Only memory addresses30. Explain the main drawback in programmed I/O (polling).A. It corrupts memory dataB. It uses up CPU time because of busy-waitingC. It needs a DMA controllerD. It is unable to transfer data at all54
Answer Schemes55
Bibliography:Andrew S. Tanenbaum, & Todd Austin. (2012). Structured ComputerOrganization (6th ed.). Pearson.Carl Hamacher, Zvonko Vranesic, Safwat Zaky, & Naraig Manjikian. (2012).Computer Organization and Embedded Systems (6th ed.). McGraw-Hill.David A. Patterson, & John L. Hennessy. (2021). Computer Organization andDesign: The Hardware/Software Interface (RISC-V ed.). Morgan Kaufmann.M. Morris Mano, & Charles R. Kime. (2016). Logic and Computer DesignFundamentals (5th ed.). Pearson.William Stallings. (2019). Computer Organization and Architecture (11th ed.).Pearson.56
9 786297 710266(online)eISBN 978-629-7710-26-6POLITEKNIK MUKAH SARAWAKIntroduction to Computer Architecture57