Semiconductor For You June 2026 Magazine

EXPLORING INDIA’S SEMICONDUCTOR AMBITIONSTECH INSIGHTThe race to build the world's next intelligent networkAccelarating the future of optical networks6G IS COMINGHow advanced packaging & testing are redefining semiconductor innovationBEYONDTHE NODETESTING HOLLOW CORE FIBER\"COMMUNICATION MODULES ARE BECOMING SECURE CONNECTIVITY PLATFORMS FOR THE SOFTWARE-DEFINED ERA.\"Magazine | News | IndustriesSemiconductorForu.comEDITION 13 | JUNE 2026TAKESHI HASHIMOTOMURATA ELECTRONICS PVT, LTD

E D I T I O NA N N I V E R S A RCATALOG Y

BATTERY CLIPS, CONTACTS,HOLDERS & RETAINERSAdvances in portable electronics and Lithium-Ion battery technology demand dependable battery connections. Keystone leads the way with a vast range of reliable, high-quality, cost-effective products for most battery types.SPACE-SAVINGFUSE CLIPS & HOLDERSFuse clips and holders for Electronics, Datacom, Telecom, Automotive and Solar use. Keystone answers your needs with SMT, Thru-Hole and Rivet mount products.SPACERS, STANDOFFS/SUPPORTS –METALLIC & NON-METALLICDiverse insulated and non-insulated spacers and standoffs are available in a wide range of lengths, thread sizes, hole sizes, mounting styles & materials. Choose from English or Metric type products for your PCB, panel and mounting applications.PINS, PLUGS, JACKS & SOCKETS,INDUSTRY’S MOST DIVERSE GROUPKeystone’s USB 2.0 & 3.0 Jacks and Plugs, Micro Pins/Jacks, Banana and Phono Plugs & Jacks are designed for use in the latest Mobile & Computer Electronics, Home Theatre, Test Gear and Industrial Interconnects.PANEL HARDWARE, HANDLES,SCREWS & LED SPACERSCheck out Keystone’s value-added products: Fan Filters & Guards, LED Lens Caps, Holders & Spacer Mounts, Jack Screws & Connector Hardware, Instrumentaion Handles, Cable Clamps, Knobs and more.PCB TEST POINTS &UL RECOGNIZED TERMINALSLow Profile and limited space drive today’s PCB connectivity designs. Keystone is the right fit with solder & solderless PCB Quick-Fit Snap-on, Snap-Fit and Screw-on terminals as well as Color-coded Screw Terminals & THM and SMT Test Points and more.Keystone Electronics Corp.Quality Electronic Conponents and HardwareLeading edge technology and precision manufacturing have defined Keystone’s performance for over 75 years. Their current Catalog K75 reflects their diversity of product to support today’s engineering and design community.Keystone’s personnel takes pride in meeting all requirements, efficiently and promptly. Our skilled and dedicated technicians, experienced production personnel and customer service teams have made us an industry leader.All Keystone facilities are fully integrated with 3D/CAD product modeling and CAD/CAM precision tool and die operations. Application and Engineering specialists utilize progressive dies, four-slides, wire forming, in-die tapping and high-speed blanking along with automated machining to produce tight tolerance standards and custom products. Secondary operations include: Tapping, Drilling, Assembly and Finishing.Application engineering services are available for product modifications or special design requirements. Products appearing in Keystone’s new and expanded Catalog K75 comply with RoHS and REACH directives. Our quality system is certified to the ISO 9001:2015 standards.IT’S WHAT’S ON THE INSIDE THAT COUNTS®E L E C T R O N I C S C O R P.55 South Denton Avenue, New Hyde Park, NY 11040 • (800) 221-5510 • (516) 328-7500www.keyelco.com • [email protected]

ContentsTechnology Updates6g is coming : The race to build the world's next intelligent networkTrending NowTech SpotlightBeyond the node: How advanced packaging & testing are redefinding semiconductor innovationSemiconductor packaging & Soc designBlog BeatITF World 2026: Defining the semiconductor roadmap for the AI eraTesting Hollow core fiber - Accelerating the future of optical networksIndustry BulletinBlog BeatEvent SpotlightSecuring India's Roads Amit Sethi | STmicroelectronics Pvt. LtdBlog Beat\"Communication Modules are becoming secure connectivity platforms for the software-defined era.\" Takeshi Hashimoto | Murata Electronics (India) Pvt. LtdIndustry DialogsHow agentic engineering is reshaping the scale and execution modelVivek Jaykrishnan | Alten IndiaBlog BeatWhy advanced packaging will define the future of semiconductorIndustry Snapshot0614102024282218343236

VIAVI provides the most comprehensive range of hollow core fiber (HCF) testing solutions, enabling manufacturers, data center interconnect operators, and contractorsto deploy new hollow core fiber with confidence.Hollow CoreFiber TestingSmart solutions for testing and certification of hollow core fiber networksContact Us:[email protected] +91 124 4511211Mumbai +91 22 25038566/766Bangalore +91 80 42281180/2103Scan toLearn More

06 | www.semiconductorforu.com Infineon Technologies has integrated its OPTIGA™ TPM SLB 9672 with NVIDIA’s Jetson Thor platform, delivering a certified, hardware-based root of trust for Physical AI applications such as robots and autonomous systems. The solution securely stores cryptographic keys, verifies software integrity, and protects AI models throughout a device’s lifecycle. Designed with post-quantum security in mind, the TPM features a quantum-resistant firmware update mechanism and supports future migration to NIST-standardized post-quantum cryptography algorithms. The collaboration helps developers build secure, compliant AI systems while addressing emerging cybersecurity requirements driven by regulations such as the EU Cyber Resilience Act and AI Act.Infineon Strengthens Physical AI Security for the Quantum EraSTMicroelectronics has introduced a new family of ultra-low-power image sensors designed to bring always-on vision capabilities to next-generation personal electronics. The sensors combine advanced imaging performance with exceptionally low power consumption, enabling continuous visual awareness without significantly impacting battery life. Target applications include smartphones, wearables, smart glasses, IoT devices, and AI-powered consumer electronics. By supporting features such as gesture recognition, presence detection, contextual awareness, and intelligent user interaction, the sensors help manufacturers deliver more responsive and immerImec and EV Group (EVG) have achieved a significant milestone in wafer-to-wafer hybrid bonding, demonstrating a 200nm copper interconnect pitch and record alignment accuracy for advanced 3D semiconductor integration. Presented at ECTC 2026, the breakthrough supports future chip-stacking architectures under imec’s CMOS 2.0 vision, enabling denser and more efficient logic and memory integration. The collaboration achieved post-bond alignment accuracy below 40nm across all dies 0102 STMicroelectronics Enables Always-On Vision for Smart Devices03 Imec and EVG Set New Hybrid Bonding Recordon 300mm wafers. Enabled by advanced process optimization and EVG’s GEMINI bonding platform, the achievement paves the way for next-generation AI, high-performance computing, and advanced memory applications requiring ultra-dense interconnects.sive user experiences. The new devices also integrate on-sensor intelligence to reduce system power requirements, supporting the growing demand for energy-efficient edge AI and vision-enabled consumer products.TECHNOLOGY UPDATES

www.semiconductorforu.com | 07VIAVI Solutions has launched the µPNT GDO-1000, a compact GNSS-disciplined oscillator engineered for precise positioning, navigation, and timing (PNT) applications in size-, weight-, and power-constrained environments. Housed in an M.2 B-key form factor measuring just 22mm × 42mm and weighing under 4 grams, the module is designed for defense platforms, unmanned systems, airborne applications, communications infrastructure, and data center equipment. The solution combines GNSS reception with a high-stability oscillator to deliver VIAVI Unveils Compact GNSS-Disciplined OscillatorQorvo has introduced a new family of wideband, high-isolation RF switches designed to simplify multi-band 5G radio architectures and eliminate the need for cascaded switch configurations. Covering a frequency range from 50 MHz to 10 GHz, the new devices help reduce component count, improve signal integrity, and lower design complexity across 5G infrastructure, industrial, drone, and test applications. The portfolio includes the QPC6144, which delivers more than 65 dB isolation in a single device, along with the QPC6122 and QPC6188 for flexible wideband RF routing. By consolidating multiple switching functions into fewer components, the solution reduces insertion loss, preserves signal linearity, and enables more efficient, compact, and cost-effective RF system designs.Microchip Technology has launched its new 3.3 kV HV-D3 mSiC™ power modules, designed to support the development of solid-state transformers (SSTs) for next-generation AI data centers and high-voltage power conversion systems. Built on advanced silicon carbide (SiC) technology, the modules deliver higher efficiency, improved power density, and reduced energy losses compared to conventional silicon-based solutions. The devices enable more compact and reliable power architectures while supporting the grow0405 Qorvo Simplifies 5G Radio Design with New RF Switch Family06 Microchip Introduces 3.3 kV Power Modules for AI Data Centersaccurate timing and synchronization, even in demanding conditions. The µPNT GDO-1000 supports the growing need for resilient, precise timing across next-generation mission-critical and connected systems.ing energy demands of AI infrastructure. In addition to data centers, the modules are suitable for smart grids, renewable energy systems, industrial power conversion, and transportation applications, helping accelerate the transition toward more efficient and sustainable power management solutions.TECHNOLOGY UPDATES

08 | www.semiconductorforu.comTDK Corporation has expanded its Micro POL (Pointof-Load) power module portfolio with new solutions designed to meet the growing power density and efficiency requirements of AI edge computing systems. The compact modules deliver high-current output in a small footprint, enabling designers to optimize board space while improving power conversion efficiency. Target applications include AI accelerators, industrial automation, networking equipment, telecommunications infrastructure, and embedded edge devices. Featuring advanced thermal performance and simplified power management, the modules support increasingly complex processors and memory architectures used in AI workloads. TDK Expands Micro POL Modules for AI Edge ApplicationsMelexis has introduced a new LIN RGB LED driver featuring integrated on-chip DC-DC power conversion, simplifying the design of automotive ambient and exterior lighting systems. By combining power management and LED control in a single device, the solution reduces component count, lowers system costs, and minimizes PCB space requirements. Designed for dynamic RGB lighting applications, the driver supports precise color control, improved energy efficiency, and enhanced thermal performance. The integrated architecture also streamlines system development and improves reliability. Targeted at modern automotive lighting designs, the new solutionhelps automakers deliver more sophisticated lighting experiences while reducing complexity and accelerating vehicle development cycles. 0708 Melexis Simplifies Automotive RGB Lighting DesignMIT Bengaluru is strengthening India’s semiconductor talent pipeline by providing students with rare hands-on exposure to chip fabrication and semiconductor manufacturing processes. Through industry collaborations and practical training initiatives, students gain insights into chip design, fabrication, testing, and packaging—areas critical to the growth of India’s semiconductor ecosystem. The program bridges the gap between academic learning and industry requirements, equipping future engineers with skills needed for advanced semiconductor careers. As India accelerates investments in chip manufacturing and design, such initiatives play a vital role in developing a skilled workforce capable of supporting the country’s ambitions to become a global semiconductor hub.09 MIT Bengaluru Nurtures India’s Next Generation of ChipmakersThe expanded portfolio helps engineers develop smaller, more efficient, and highly reliable systems capable of handling next-generation edge AI processing demands.TECHNOLOGY UPDATES

STMicroelectronics has introduced a new family of gallium nitride (GaN) power semiconductors designed to improve energy efficiency and power density in demanding applications ranging from AI servers and data centers to industrial automation and robotics. Built on ST’s advanced GaN technology, the devices offer faster switching speeds, lower power losses, and more compact system designs compared to traditional silicon-based solutions. The new semiconductors enable designers to reduce energy consumption while increasing performance in high-power applications. As AI workloads and automation 10 ST Expands GaN Portfolio for AI and Robotics Power Systemssystems continue to grow, ST’s latest GaN portfolio helps address the industry's need for more efficient, sustainable, and high-density power conversion solutions across next-generation electronic systems.www.semiconductorforu.com | 09Melexis has introduced the MLX92344, the world’s first 2-wire, 2-bit Hall switch, enabling contactless detection of up to four positions while maintaining compatibility with existing two-wire automotive systems. The innovative sensor eliminates bulky mechanical microswitches, helping reduce system complexity, wiring, and overall footprint. With programmable current levels and magnetic thresholds, the MLX92344 offers greater design flexibility for automotive body electronics such as seat-position sensing, soft-close doors, charging ports, and 11 Melexis Unveils Industry-First 2-Wire 2-Bit Hall Switchmulti-level trunk locks. The PCB-less solution enhances reliability, supports advanced safety requirements, and paves the way for more compact and intelligent vehicle electronics.MediaTek and Samsung have successfully completed the industry's first 3Tx 5-layer uplink configuration test, achieving an impressive 670 Mbps uplink speed and setting a new milestone for 5G performance. The demonstration combined MediaTek’s M90 5G modem platform with Samsung’s advanced network technologies, including virtualized RAN (vRAN) and Massive MIMO radios. Using a multi-band setup across n66 and n77 spectrum bands, the breakthrough significantly improves uplink capacity, spectral efficiency, and network performance. The achievement is expected to enhance cloud applications, immersive digital experiences, Fixed Wireless Access (FWA), live streaming, and other data-intensive services, paving the way for next-generation 5G connectivity.MediaTek & Samsung Set New Benchmark for 5G Uplink Speed 12TECHNOLOGY UPDATES

10 | www.semiconductorforu.com BEYONDTHE NODE HOW ADVANCED PACKAGING AND TESTING ARE REDEFININGSEMICONDUCTOR INNOVATIONFor years, shrinking transistor dimensions delivered predictable improvements in performance, power consumption, and cost. However, as the industry approaches the physical and economic limits of advanced process nodes, further scaling has become significantly more expensive. Advanced packaging offers an alternative path to innovation. Rather than integrating every funcAs transistor scaling faces economic and physical limits, advanced packaging and testing have emerged as the semiconductor industry's next innovation frontier. Heterogeneous integration, 3D packaging, chiplet architectures, and evolving OSAT capabilities are enabling higher performance, greater energy efficiency, and faster time-to-market. This transformation is reshaping design, manufacturing, and supply-chain strategies across AI, automotive, communications, and high-performance computing applications.For decades, semiconductor progress was measured by transistor density and shrinking process nodes. Today, however, the industry's most significant breakthroughs are increasingly happening outside the silicon die itself. As Moore's Law slows and system complexity accelerates, advanced packaging and testing technologies have become critical enablers of next-generation electronics. The rapid growth of artificial intelligence (AI), high-performance computing (HPC), autonomous vehicles, 5G infrastructure, and edge computing is driving unprecedented demand for performance, bandwidth, power efficiency, and integration density. Meeting these requirements through monolithic chip designs alone is becoming economically unsustainable and technically challenging.As a result, the semiconductor ecosystem is embracing heterogeneous integration, chiplet-based architectures, 2.5D and 3D packaging, and sophisticated testing methodologies. Simultaneously, Outsourced Semiconductor Assembly and Test (OSAT) providers are evolving from manufacturing partners into strategic innovation collaborators. The future of semiconductor advancement is no longer determined solely by process technology—it is increasingly defined by how chips are packaged, interconnected, and validated.1. The Shift from Scaling to System IntegrationTECH SPOTLIGHT

www.semiconductorforu.com | 11tion onto a single monolithic die, designers can now combine multiple specialized chiplets manufactured using different process technologies into a single package. This approach allows companies to optimize performance, cost, and yield while reducing development complexity. Heterogeneous integration has become particularly attractive because it enables the integration of processors, memory, analog components, RF devices, photonics, and accelerators within a unified package. Major semiconductor companies are increasingly adopting this strategy to build highly optimized systems tailored for specific workloads, especially in AI and data-center applications.\"THE NEXT DECADE OF SEMICONDUCTOR INNOVATION WILL BE DRIVEN AS MUCH BY PACKAGING ARCHITECTURE AS BY TRANSISTOR TECHNOLOGY. \"The chiplet revolution is rapidly transforming semiconductor design methodologies. Instead of manufacturing a large and complex system-on-chip (SoC), companies can develop smaller functional dies that are interconnected within a package. Each chiplet can be fabricated using the most suitable process node for its function. This modular approach provides several advantages: • Improved manufacturing yields • Reduced development costs • Faster design cycles • Greater design flexibility • Easier product customizationThe growing adoption of standards such as Universal Chiplet Interconnect Express (UCIe) is further accelerating ecosystem development by enabling interoperability between chiplets from different vendors. Recent developments from leading semiconductor companies demonstrate how chiplet-based architectures are becoming central to AI processors, data-center accelerators, networking equipment, and automotive platforms. As AI workloads continue to grow exponentially, chiplet architectures are expected to become the dominant design strategy for advanced computing systems.2. Chiplets and Heterogeneous Integration Gain MomentumAmong the most significant packaging breakthroughs is the rise of 3D integration. Traditional packages place components sideby-side on a substrate. In contrast, 3D packaging stacks semiconductor dies vertically, dramatically reducing interconnect distances and improving bandwidth while lowering power consumption. Technologies such as Through-Silicon Vias (TSVs), hybrid bonding, and wafer-to-wafer stacking are enabling increasingly sophisticated multi-die architectures. High-Bandwidth Memory (HBM), a critical component in AI accelerators and GPUs, relies heavily on advanced 3D stacking technologies. The explosive growth of generative AI has significantly increased demand for HBM integration capabilities. Industry leaders are investing billions of dollars in expanding advanced packaging capacity to support growing requirements for AI infrastructure. The benefits of 3D integration include:• Higher data-transfer rates • Lower latency • Reduced power consumption • Smaller form factors • Enhanced system-level performance As AI systems continue to scale, 3D packaging is expected to become a cornerstone technology for future computing platforms.3. 3D Packaging Moves into the MainstreamAs package complexity increases, testing requirements are evolving equally rapidly. Traditional test methodologies were designed primarily for single-die devices. Modern multi-chip packages require comprehensive testing across multiple levels, including wafer-level, die-level, package-level, and system-level validation. Advanced packaging introduces new challenges such as:• Die-to-die connectivity verification • Thermal management validation • Signal integrity testing • Reliability assessment • Power delivery analysis Testing is no longer merely a quality-control process—it has become an essential component of product design and optimization. Artificial intelligence is also transforming semiconductor testing itself. AI-powered analytics are helping manufacturers detect defects earlier, improve yields, and optimize production processes. Meanwhile, digital twins and predictive testing technologies are enabling more efficient validation of increasingly complex semiconductor systems. As chiplet adoption accelerates, robust Known Good Die (KGD) testing will become even more important to ensure overall package reliability.4. Advanced Testing Becomes Mission-CriticalTECH SPOTLIGHT

12 | www.semiconductorforu.com The role of OSAT companies is undergoing a fundamental transformation. Historically focused on assembly and testing services, leading OSAT providers are now investing aggressively in advanced packaging technologies and engineering expertise.The rise of heterogeneous integration has created new opportunities for OSAT companies to become strategic technology partners. Major OSAT firms are expanding capabilities in:• Fan-Out Wafer-Level Packaging (FOWLP) • 2.5D interposer technologies • 3D IC integration • Advanced substrate manufacturing • System-in-Package (SiP) solutions • Automotive-grade testingThis evolution is particularly important because advanced packaging capacity has emerged as a critical bottleneck for AI and HPC deployments. Many semiconductor companies now depend on OSAT partners not only for manufacturing execution but also for packaging innovation and design collaboration. The industry's growing investment in packaging ecosystems reflects the strategic importance of these capabilities in maintaining competitive advantage.5. OSAT Providers Move Up the Value ChainNo technology trend is influencing packaging innovation more profoundly than artificial intelligence. Modern AI processors require enormous memory bandwidth, low latency, and efficient power delivery. Achieving these performance levels depends heavily on advanced packaging solutions. Leading AI accelerators increasingly integrate:• Multiple compute dies • Stacked HBM memory • Advanced interconnect fabrics • Sophisticated thermal-management systems These requirements are pushing packaging technologies beyond traditional boundaries. Industry analysts predict that advanced packaging revenues will grow significantly over the next decade as AI deployment expands across cloud computing, enterprise infrastructure, automotive systems, industrial automation, and consumer devices. Packaging has become a strategic differentiator for companies competing in the AI era.6. AI Drives Unprecedented Packaging DemandGovernments worldwide are recognizing advanced packaging as a critical element of semiconductor competitiveness. The United States, Europe, Japan, South Korea, Taiwan, and India are all increasing investments in packaging and testing infrastructure. Several national semiconductor initiatives now include dedicated support for: • Advanced packaging R&D • Packaging pilot lines • Workforce development• Supply-chain resilience • Testing infrastructure India, in particular, is placing growing emphasis on semiconductor assembly, testing, marking, and packaging (ATMP) facilities as part of its broader semiconductor strategy. These investments reflect a growing understanding that packaging capabilities are becoming just as strategically important as wafer fabrication.7. Regional Investments Strengthen the EcosystemThe semiconductor industry is entering a new phase where system-level innovation increasingly determines competitive success. While process-node advancements will continue, future performance gains will depend heavily on how diverse technologies are integrated within increasingly sophisticated packages. Heterogeneous integration, chiplet architectures, 3D stacking, advanced testing methodologies, and the evolution of OSAT providers are collectively reshaping the industry's innovation model.As AI, autonomous systems, edge computing, and next-generation communications continue to advance, packaging and testing will play an even greater role in defining semiconductor capabilities. The industry's future is no longer built solely inside the transistor. It is being engineered across packages, interconnects, substrates, and testing platforms that bring entire systems together. Advanced packaging and testing have moved from the back end of semiconductor manufacturing to the center of technological progress—and they are poised to become the defining innovation frontier of the decade.8. The Road AheadTECH SPOTLIGHT

www.semiconductorforu.com | 11TECH SPOTLIGHT

14 | www.semiconductorforu.com What’s Trending in the 6G Race?Why Is the World Already Talking About 6G?6G IS COMINGTHE RACE TO BUILD THE WORLD'S NEXT INTELLIGENT NETWORKThe global telecom industry is already moving beyond 5G as the race toward 6G gains momentum. More than a network upgrade, 6G is expected to create AI-native, intelligent connectivity capable of powering autonomous systems, immersive digital experiences, smart industries, and machine-to-machine communication in real time. With governments, semiconductor companies, telecom operators, and tech giants accelerating investments, 6G is emerging as one of the decade’s biggest technology trends.Even before 5G reaches full maturity globally, the conversation around 6G has intensified across the telecom and semiconductor ecosystem. Governments are launching national 6G missions, telecom operators are forming strategic alliances, and chipmakers are investing in next-generation wireless technologies designed for ultra-fast, intelligent communication. The biggest shift is that 6G is no longer being viewed as simply “faster internet.” Instead, it is being positioned as the foundation for the AI-driven economy of the future.From holographic communication and immersive extended reality to autonomous transportation, smart factories, and digital twins, 6G is expected to become the backbone for technologies that require near-zero latency, massive data processing, and real-time responsiveness. Technology giants worldwide are increasingly discussing “AI-native networks” — systems where artificial intelligence is embedded directly into the communication infrastructure itself. This trend is becoming one of the defining themes shaping the future of telecom.The answer lies in the explosive growth of connected technologies. The next decade will witness billions of connected devices, autonomous machines, industrial robots, AI systems, and immersive applications operating simultaneously. Current network architectures may struggle to handle the scale, speed, and intelligence required for this digital transformation. That is where 6G enters the picture. Industry experts expect 6G networks to deliver:• Terabit-level wireless speeds • Microsecond latency • AI-powered network management • Intelligent sensing capabilities • Seamless satellite integration • Ultra-reliable machine communication Unlike previous generations of wireless technology, 6G is expected to combine communication, sensing, computing, and automation into one unified ecosystem. In simple terms, future networks may not only transmit information — they may also “understand” and respond to their environment in real time.TRENDING NOW

www.semiconductorforu.com | 15The Biggest Question: Will 6G Really Change Everyday Life? The telecom industry believes the answer is yes. While 5G largely improved mobile broadband and enterprise connectivity, 6G could fundamentally reshape how humans interact with technology. Imagine:• Holographic video meetings instead of traditional video calls • Real-time language translation during conversations • Fully autonomous transportation systems • Remote robotic surgeries with near-zero delay • Smart factories that operate autonomously • Digital replicas of cities, industries, and infrastructure The concept of the “Internet of Everything” may finally become practical with 6G. Experts also believe 6G will accelerate immersive technologies such as augmented reality (AR), virtual reality (VR), and mixed reality (MR), enabling experiences far beyond current capabilities.AI-Native Networks: The Heart of 6GOne of the most talked-about trends in 6G development is the rise of AI-native telecom infrastructure. Today’s telecom networks already use AI tools for optimization and analytics. However, 6G networks are being designed with AI embedded into the core architecture itself. This means future networks could:• Predict congestion before it happens • Automatically repair network failures • Optimize power consumption dynamically • Detect cyber threats instantly • Allocate bandwidth intelligently based on demand Telecom infrastructure may evolve into self-learning and self-healing digital ecosystems. This shift is expected to significantly reduce operational complexity while improving efficiency, performance, and sustainability.\" THE FUTURE OF WIRELESS TECHNOLOGY IS NOT ONLY ABOUT SPEED, BUT ABOUT CREATING NETWORKS INTELLIGENT ENOUGH TO THINK, ADAPT, AND OPTIMIZE AUTOMATICALLY. \"TRENDING NOW

16 | www.semiconductorforu.com The Global Race Has Already StartedCountries across the world are aggressively positioning themselves in the 6G race. The United States, China, Japan, South Korea, Europe, and India have all announced major research initiatives, strategic partnerships, and next-generation telecom programs aimed at shaping future standards.The competition is no longer just technological — it is also geopolitical. Control over future telecom infrastructure may influence digital economies, cybersecurity leadership, semiconductor dominance, and global technology ecosystems for decades.What Happens Next?Commercial 6G deployment is widely expected around 2030, but the groundwork is already being laid today. Over the next few years, the industry will likely witness:• Early 6G testing programs • Standardization discussions • AI-native telecom platforms • Satellite-network convergence • Semiconductor breakthroughs • Advanced wireless research partnershipsThe transition toward 6G represents far more than another generational upgrade. It signals the beginning of a future where communication networks become intelligent digital ecosystems capable of powering autonomous industries, immersive experiences, and AI-driven societies. The telecom industry built the connected world through 4G and 5G. With 6G, it may attempt to build the intelligent world.The Rise of Integrated Sensing NetworksAnother major 6G trend gaining attention is Integrated Sensing and Communication (ISAC). Future networks may function not only as communication systems but also as sensing platforms capable of monitoring surroundings in real time. This could enable:• Smart traffic management • Advanced industrial automation • Environmental monitoring • Precision agriculture • Intelligent healthcare systems • Enhanced public safety infrastructure In future smart cities, communication towers themselves could become intelligent sensing hubs.The 6G revolution will not happen without semiconductor innovation. Future wireless systems will require highly advanced chips capable of handling:• Massive AI workloads • High-frequency communication • Real-time processing • Ultra-low-power operation This is creating enormous opportunities for semiconductor companies developing RF technologies, AI accelerators, photonic chips, advanced packaging solutions, and energy-efficient processors. The transition toward sub-terahertz and terahertz communication frequencies is also pushing chipmakers to explore entirely new materials and architectures. In many ways, the future success of 6G may depend as much on semiconductor innovation as on telecom infrastructure itself.Why Semiconductor Companies Are Central to the 6G EraThe Challenges Nobody Can IgnoreDespite the excitement, the path toward 6G is far from easy.1. Infrastructure CostsTelecom operators globally are still investing heavily in 5G deployment. Building 6G networks could require even larger investments in spectrum, fiber backhaul, antennas, data centers, and AI-driven infrastructure.2. Energy ConsumptionFuture networks will process enormous amounts of data continuously. Without major efficiency improvements, energy demands could rise dramatically. This is why sustainability is becoming a central theme in 6G research.3. Cybersecurity RisksAs networks become deeply connected to healthcare, transportation, factories, utilities, and defense systems, cybersecurity threats will become more complex and dangerous. Future networks will likely require AI-powered threat detection and quantum-resistant encryption technologies.4. Monetization ConcernsOne major industry question remains: How will telecom operators generate returns from 6G investments? The industry is still exploring sustainable business models capable of justifying the next wave of infrastructure spending.TRENDING NOW

www.semiconductorforu.com | 21TRENDING NOWWE POWER YOUR PRODUCTSrecom-power.comRAC20NE-K HIGHLY VERSATILE 20W AC/DC POWER SUPPLY• 85-305VAC wide input• 12,24 or 36VDC output• 4kVAC isolation OVC III• Full load power rating to 55°C• Optional CV/CC overcurrent limited• Enhanced EMI filter for grounded connections

18 | www.semiconductorforu.com \"COMMUNICATION MODULES ARE BECOMING SECURE CONNECTIVITY PLATFORMS FOR THE SOFTWARE-DEFINED ERA\"As wireless connectivity becomes central to automotive, industrial IoT, and smart infrastructure, Vaishali Umredkar, Editor of Semiconductor For You speaks with Takeshi Hashimoto, Managing Director, Murata Electronics (India) Private Limited on how Murata Electronics is advancing module innovation through miniaturization, multi-protocol integration, and reliability-driven design to meet next-generation communication demands across India’s fast-evolving electronics ecosystem.Q: In dense IoT environments, how does Murata ensure stable, interference-free communication?In dense environments, the goal is not to eliminate interference entirely, but to ensure stable operation under interference conditions. By combining standard- level frequency control, hardware-level interference suppression design, and system-level channel optimization, we enhance overall communication quality in a comprehensive manner.Q: For safety-critical applications like automotive and healthcare, what differentiates Murata’s communication solutions?In automotive applications, we support stringent qualification standards and ensure stable performance under high-temperature and high-frequency conditions, contributing to robust connectivity in the V2X and 5G era. In medical applications, we operate under ISO 13485-compliant manufacturing systems and implement 100% inspection to minimize initial failures, achieving quality levels suitable even for life-related applications. Our differentiation lies in a design and manufacturing foundation that can demonstrate long-term reliability.Q: How important is interoperability and multi-protocol support in Murata’s communication product strategy today?As connected device applications expand, interoperability becomes a prerequisite for adoption. While multi-protocol capabilities are often driven by semiconductor vendor roadmaps, we strategically select and integrate those technologies into module solutions that best fit specific market needs. By integrating Wi-Fi, Bluetooth, Thread, and other technologies—and enabling connectivity to higher- level ecosystems such as Matter—we reduce customers’ development complexity and deployment costs. Multi-protocol support is therefore critically important in our current strategy. Q: How is Murata preparing its communication technologies for higher data rates, lower latency, and increased device density?To address high-throughput technologies such as Wi-Fi 7 and low-latency, high- reliability cellular communications, we are advancing multi-band designs, high- density integration, thermal management, and certification readiness ahead of Q: Murata has evolved from discrete RF components to complete communication modules—what market needs drove this shift?As applications have diversified and performance requirements have become more sophisticated, wireless functionality is increasingly expected to be delivered not as individual components, but as fully validated systems that work reliably.Market demands for shorter development cycles, reduced certification burdens, and optimized coexistence among multiple wireless standards have accelerated the shift from discrete components to module-based solutions.Q: How does Murata manage extreme miniaturization while maintaining performance and reliability in wireless communication modules?We reduce component volume through material and process miniaturization, while addressing noise, thermal, and coexistence challenges through high-density RF front-end integration and optimized shielding structures. By leveraging advanced simulation technologies, we are able to achieve both compact size and high reliability simultaneously.Q: With multiple wireless standards coexisting, how does Murata decide which technologies to prioritize in its product roadmap?We determine priority technologies by aligning market needs with our technical strengths, evaluating application suitability, regulatory requirements, ecosystem maturity, and manufacturability. In addition, we continuously analyze standardization trends and carefully select technologies by accurately assessing and marketing the wireless capabilities required in each target market. Q: How does Murata’s deep RF expertise translate into system-level advantages for IoT and connected devices?Because we offer everything from RF front-end modules and acoustic wave devices to antenna interference mitigation components in-house, we can optimize circuit design, enclosure design, and coexistence performance in an integrated manner. This enables us to simultaneously achieve miniaturization, sensitivity, EMC performance, and production reproducibility—creating true system-level advantages.INDUSTRY DIALOGS

www.semiconductorforu.com | 19TAKESHI HASHIMOTOMANAGING DIRECTORMURATA ELECTRONICS (INDIA) PVT. LTDdemand. Rather than simply following standards, we design modules with mass production and quality assurance in mind to prepare for future requirements. Q: How does Murata see demand evolving in India for wireless modules across automotive, industrial, and smart infrastructure applications?In India, demand for connectivity in automotive electronics, infrastructure monitoring, and industrial IoT is expanding, driven by electrification, smart city initiatives, and industrial modernization policies. We expect the importance of highly reliable, long-range, and low-power wireless modules to continue increasing in this market.Especially, Murata sees significant growth in Connectivity modules for the 2W and 4W Automotive applications with support for long-range, low-power industrial IoT and edge-AI systems as India modernizes agriculture, factories, and environmental monitoring.Q: As connectivity becomes central to software-defined systems, how does Murata see the role of communication modules changing over the next decade?With the advancement of software-defined architectures, communication modules will evolve from simple wireless components into connectivity platforms that incorporate OTA updates and security functions. In SDV and advanced IoT environments in particular, they will serve as secure connectivity foundations with certifiable reliability and full traceability.INDUSTRY DIALOGS

20 | www.semiconductorforu.com SEMICONDUCTOR PACKAGING & SoC DESIGNANTONIO VELASCOI’ve had the opportunity to intern for semiconductor companies throughout my career and learned that packaging is far more than just placing a chip in a protective shell and on a board. Package engineering encompasses a little bit of everything: electrical, mechanical, thermal, and materials—it covers every type of engineering. This one field alone dictates performance, reliability, manufacturability, cost, and so much more. Although silicon designers get the chip designed and foundries fabricate it, packaging turns it from a random die to an actionable component. For anybody curious or considering a career path in packaging, it is essential to understand today’s electronics as a whole.What is Semiconductor Packaging?Whenever I say that I work on semiconductor packaging, most people think of boxes or bags. Granted, package engineering for boxes and the like is a big thing in the industry (Rutgers even offers a degree in it), but semiconductor packages are a whole different thing. \"Packaging\" refers to the process of enclosing a fabricated die inside a protective system that not only keeps it active but also ensures electrical connectivity, thermal management, and integration.The most common thought of a semiconductor is the raw chip after it is fabricated onto a silicon wafer, or rather, the individual die. Here’s an example of the LM2576T die from Texas Instruments, a simple voltage regulator. Packaging transforms this bare die into a functional electronic component. Not only that, but it also ensures mechanical support and durability, thermal management, power delivery, and overall robustness. In today’s semiconductor industry, packaging has become a system-level design discipline rather than simply a post-fabrication step.These days, packaging is more important than ever as we get smaller in terms of fabrication. Nowadays, the limit isn’t in the gate size (as it has traditionally been), but rather in the physical limitations and manufacturing complexity of the package around it. Performance growth relies on packaging, especially in SoC design, where CPU, GPU, memory, and more separate blocks need to work together.Considerations and FunctionsWithin semiconductor packaging, as mentioned, come many different disciplines. It acts as a form of system engineering and requires many different considerations. The first of which is electrical. Obviously, in order for a semiconductor die to work efficiently, its electrical connections between the silicon and the external circuitry (like that of a PCB) need to be reliable. Signals, power, data, and more need to flow through the chip efficiently. The name of the game here is the connection with the chip itself. You might’ve experienced soldering a component to a PCB—the concept is the same here. The chip must be connected to its external packaging, which can then be connected elsewhere. Wire bonding is a popular method, but flipchip bonding may be an option as well. The main consideration comes when signal integrity is paramount, like in high-speed digital and RF applications.The word \"semiconductor\" is a strong buzzword. They drive the stock market, enable all of our electronics and systems, and essentially hold up the world. Yet, when most people think of semiconductors, they think of the silicon chip: a tiny, intricate network of logic gates and components that make up our computers. However, the manufactured chip itself is only half the battle, and there lies a whole discipline that enables these chips to even function: semiconductor packaging.BLOG BEAT

www.semiconductorforu.com | 21Next up is thermal management. You might notice your computer or phone gets hot after a while—that's because modern chips generate significant heat due to high transistor densities and switching speeds. Excessive temperature can degrade performance, shorten device lifespan, and cause catastrophic failure. Effective packaging can help to mitigate this, either by providing thermal pathways to remove heat and transfer it to heat sinks or to simply provide fewer “hot spots.” This means doing a ton of simulations and looking a lot into material selection. In any case, effective thermal management means better performance and reliability.Mechanical reliability is also an important consideration, especially when we consider the fact that by itself, the silicon die is extremely fragile. When we’re talking about super small gate sizes and traces, any small amount of moisture or contamination can be an issue. This was something I focused a lot on in my previous internship, especially when it came to mechanical stress. Vibration, solder fatigue, and material cracking were topics that came up all the time.Another common consideration is power delivery. With the size of chips these days, power delivery is becoming more and more challenging. Power blocks often litter boards as advanced processors require extremely stable and low-variety power supplies. When designing packages, power distribution must be at the forefront to prevent voltage drops and EMF. Moreover, with how sensitive dies can be, any small overcurrent or voltage spike can cause catastrophic damage.The Interdisciplinary Nature of Package EngineeringWith all of these considerations, it’s no surprise that packaging requires expertise across a variety of domains. Materials engineers develop substrates and thermal interfaces; electrical engineers ensure power delivery and EMF shielding; mechanical engineers minimize stress and vibration; and thermal engineers model heat flow and propose cooling strategies. There’s something for everybody, and mastering the domain requires a little bit of everything. For me, this provides the perfect opportunity to get involved. I’ve always been more drawn to systems engineering and want to pursue it more in the future. What better place to be than to use my electrical engineering background to get my foot in the door and to better understand all of the other fields in the context of microelectronics?Career OpportunitiesAs I mentioned, I’ve found a comfortable niche in semiconductor packaging as a package reliability engineer. This means ensuring that the proposed package design is not just viable, but also stable and efficient in terms of thermal management, electrical routing, and much more. It puts together everything I’ve loved from my classes and past experience and allows me to continue growing as an engineer. Within semiconductor packaging, there lies a variety of other careers:to influence and ensure real-world device performance and to work hands-on with physical hardware. It's also an exciting time as we look towards incorporating photonics and increasingly more complex chip designs. With increasing global investment in semiconductor manufacturing and advanced packaging facilities, engineers entering this field can expect long-term career opportunities.Semiconductor packaging is the true bridge between electrical design and real-world application. As transistor scaling becomes more and more challenging (we’re reaching the edge of what’s physically possible), packaging has become the primary driver of innovation. Stacking and the integration of multiple dies into one package have allowed optimization, and development is only advancing. For anybody looking to explore a microelectronics career, packaging offers both an exciting and multidisciplinary path towards shaping the future of technology.• Signal Integrity Engineering• Thermal Engineering• Materials Engineering• Manufacturing Engineering• Design EngineeringThere’s something for most engineers, and if you’re interested in dipping into a little bit of everything, Package Engineering provides an interdisciplinary path for you. It is a unique opportunity BLOG BEAT

22 | www.semiconductorforu.com SECURING INDIA'S ROADSAs India faces rising road safety challenges, advanced semiconductor technologies, connected security systems, AI, and intelligent mobility solutions are emerging as key enablers for safer transportation. Amit Sethi of STMicroelectronics explores how smart, connected ecosystems can help reduce accidents, improve vehicle security, and support the future of safer, smarter roads in India.AMIT SETHIVICE PRESIDENT DELIVERY CENTERS SR. MARKETING MANAGER, CONNECTED SECURITY, STMICROELECTRONICS PVT LTDIndia's automotive sector is accelerating toward a connected, electrified future, with millions of vehicles now equipped with electronic control units (ECUs), advanced driver-assistance systems (ADAS), and overthe-air (OTA) updates. However, this evolution introduces cyber vulnerabilities, from CAN bus hijacking to remote ECU manipulation. Enter AIS-189 and AIS-190—Indian Automotive Industry Standards (AIS) crafted by the Automotive Industry Standards Committee (AISC) under the Automotive Research Association of India (ARAI). These norms, aligned with UNECE R155/R156 and ISO/SAE 21434, mandate robust cybersecurity frameworks for vehicle homologation. AIS-189 establishes a comprehensive Cyber Security Management System (CSMS) for Original EquipBLOG BEAT

www.semiconductorforu.com | 23ment Manufacturers (OEMs), requiring proactive identification, assessment, and mitigation of cyber risks across the entire vehicle lifecycle—from concept and design to decommissioning. Applicable to vehicles in categories M (passenger), N (goods), and T (agricultural), plus select L7 two-wheelers with advanced automation, it targets systems with ECUs handling critical functions. This standard doesn't just enforce rules, it fosters a security-first culture. By embedding cybersecurity into design (e.g., via secure boot and encrypted communications), it shields against evolving threats in India's dense traffic and smart city integrations.Complementing AIS-189, AIS-190 focuses on the Software Update Management System (SUMS), addressing the OTA revolution powering EVs, infotainment, and autonomy. It applies to update-capable vehicles in categories M, N, T, A (mopeds), and C (tricycles), ensuring updates maintain integrity, authenticity, and traceability. Key mandates cover cryptographic signing of firmware, rollback mechanisms to safe states, and audit logs for post-update verification.No CSMS or SUMS is viable without specialized hardware. Leading the charge are the Hardware Security Modules (HSMs) tamper-resistant chips embedded in ECUs for isolated cryptographic operations. They provide secure key storage, random number generation, and hardware-accelerated AES/ECDSA for CAN/Ethernet encryption. Trusted Execution Environments (TEEs) create fortified processor enclaves for sensitive tasks such as OTA authentication. They isolate crypto from the rich OS, thwarting side-channel attacks. Secure Elements, including Trusted Platform Modules (TPMs) anchor root-of-trust. Secure elements offer tamper-resistant storage for cryptographic keys and sensitive data, enabling secure boot, V2X communication, digital keys, OTA updates, and in-vehicle payments. They isolate security processes from main processors, reducing risks of tampering, cloning, and remote attacks while complying with standards like ISO/SAE 21434. Automotive-grade SEs also support EV charging authentication and enhance communication in noisy environments. Automotive-specific TPMs integrate easily and provide integrity reporting by TCG standards. These deliver secure boot (verifying firmware integrity at power-on), key provisioning, and anti-cloning for ECUs. In AIS-189 TARA, they quantify risks and in AIS-190, they validate update chains. By mandating CSMS/SUMS and hardware like HSMs, they secure 5G-V2X fleets, EV swarms, and autonomous shuttles. OEMs embracing them today lead tomorrow’s billions-dollar market. STSECURE products and solutions, from STMicroelectronics, protect privacy and assets by ensuring confidentiality, integrity, and availability to authorized requesters where and when needed. ST provides certified hardware and software solutions, enables seamless integration of security features, and specializes in cryptography and device architecture.BLOG BEAT

24 | www.semiconductorforu.com HOW AGENTIC ENGINEERING IS RESHAPING THE SCALE AND EXECUTION MODELOver the last two and a half decades, our industry has competed on two things: scale and execution. Global delivery centers were built to absorb engineering demand - CAD, embedded software, simulation, documentation and deliver reliably, on time and at competitive cost. That model will continue. But it will not define who leads the next decade. Agentic AI - systems that can plan, act, iterate, and course-correct with minimal human input - is beginning to change the nature of engineering work itself. The shift is not incremental. It is structural.From copilot to agentEngineering teams are now familiar with AI copilots. They assist with coding, summarization, and documentation - but they still require continuous human direction. Agents operate differently. Given a defined goal, an agent can break down the problem, generate solutions, run simulations, interpret results, and iterate toward optimized outcomes. Engineers remain accountable, but their role shifts - from executing tasks to evaluating outcomes. At scale, this transition begins to redefine productivity and cost structures across engineering programs.VIVEK JAYKRISHNANVICE PRESIDENT DELIVERY CENTERSALTEN INDIAAbout the AuthorVivek Jaykrishnan brings over 27 years of experience at the intersection of engineering, technology and business transformation. A dynamic leader, he has consistently driven excellence across engineering services - spanning operations, delivery management, talent strategy and technology innovation. Known for building high-impact teams and scaling capabilities, Vivek has played a key role in delivering complex, future-ready solutions for global clients across industries. Currently serves as Vice President - Delivery Centers at ALTEN India, he continues to champion innovation, operational excellence and talent-led transformationBLOG BEAT What is changing across engineering workflowsIn mechanical engineering, design cycles that once took weeks are compressing into days as agents handle iterative loops. Outputs are faster and more robust, supported by simulation evidence and built-in traceability. In embedded systems, agents are enabling autonomous workflows—decomposing requirements, generating code, running tests, and identifying defects. Complex update cycles that previously took weeks can now be executed far more efficiently. In systems engineering, agents reduce fragmentation by maintaining traceability, identifying conflicts early, and improving consistency across tools and teams. In technical documentation, static deliverables are being replaced by dynamic systems that update with engineering changes and provide context-aware insights.

www.semiconductorforu.com | 25What this looks like in practiceIn our work at ALTEN, we are beginning to see this shift move from concept to deployment. In a recent engagement in the U.S. industrial machinery space, agentic AI is being applied across the value chain—from autonomous sales quoting to workflow orchestration and AI-assisted engineering outputs. What makes this significant is not just the use of AI, but where it is being applied. In an industry where adoption is still nascent, these systems are starting to reshape how engineering and operational decisions are made—introducing new levels of speed, consistency, and adaptability. This is not an isolated pilot. It is an early indicator of how agentic capabilities will embed themselves into core engineering workflows.A case in pointAn equipment manufacturer facing recurring component failures would traditionally spend weeks on analysis, redesign, and validation. With an agentic approach, field data is analyzed automatically, design alternatives are generated and tested, manufacturability is validated, and documentation is updated in parallel. Engineers remain responsible for final decisions, but they engage with a problem that is already structured and supported by evidence. The result is a significantly compressed cycle time.BLOG BEATWhere this is already visibleIn aerospace, agents are running large-scale design optimizations overnight, delivering validated options with built-in compliance traceability. In automotive, anomaly detection, patch development, and validation cycles are compressing significantly through agent-driven workflows. In industrial environments, machines are beginning to detect deviations, adjust operations, and trigger downstream actions such as maintenance or supply chain responses. These are not future scenarios—they are emerging in active programs.From cost arbitrage to capability arbitrageEngineering delivery has long been driven by cost efficiency and scale. That advantage is diminishing. As agentic systems take on execution-heavy tasks, differentiation shifts to capability—specifically, the strength of agentic platforms, domain expertise, and governance. This transition requires: • A shift in talent toward validation, orchestration, and judgment • Investment in reusable engineering assets such as agent libraries and simulation pipelines • Movement toward outcome-based models as effort becomes less tied to headcount

26 | www.semiconductorforu.com Governance is non-negotiableAgentic systems introduce new risks, particularly the ability to scale errors rapidly. Three principles are critical: • Clear human accountability in all regulated workflows • Complete, auditable decision trails • Strict operating boundaries with continuous validation Without these, efficiency gains come at unacceptable risk.What leaders should focus on nowStart with workflows. Identify where cycle time, rework, or resource constraints are limiting performance. Strengthen the data foundation. Agentic systems depend on well-structured, well-governed engineering data. Run pilots with production intent. Define success clearly and ensure integration into real workflows. Measure what matters—cycle time, quality, and adaptability—not utilization.The shift aheadEngineering services are moving toward a model defined by intelligence, domain depth, and agentic capability. Traditional scale-driven approaches will remain, but they will no longer be sufficient on their own. The shift is already underway. The question is whether organizations are adapting at the pace required.BLOG BEAT

www.semiconductorforu.com | 37BLOG BEAT

28 | www.semiconductorforu.comITF World 2026Defining the Semiconductor Roadmap for the AI EraThe global semiconductor industry gathered in Antwerp, Belgium, on May 19 and 20 for ITF World 2026, one of the world’s most influential semiconductor and deep-tech forums organized annually by imec. Bringing together technology leaders, researchers, policymakers, startups, and investors, the event focused on the theme “Strategic Paths to an AI-Defined Future,” reflecting how artificial intelligence is rapidly reshaping the direction of semiconductor innovation.As AI adoption accelerates across industries, ITF World 2026 became a crucial platform to discuss the technologies required to power the next generation of intelligent systems. From advanced logic scaling and photonics to packaging innovations and AI accelerators, the event highlighted how semiconductor technology is becoming the backbone of the global AI revolution.A Global Platform Driving the Future of AI and SemiconductorsEVENT SPOTLIGHT

www.semiconductorforu.com | 29One of the strongest messages from ITF World 2026 was that the future of AI depends heavily on breakthroughs in semiconductor infrastructure. Industry experts emphasized that emerging AI applications, including generative AI, autonomous systems, robotics, and edge intelligence, require significantly higher computing power along with better energy efficiency and faster data movement.As traditional scaling approaches become increasingly complex, companies are now exploring new compute architectures, heterogeneous integration, chiplet-based designs, and advanced packaging technologies. Discussions throughout the event highlighted how semiconductor innovation is evolving from purely transistor scaling toward system-level optimization.Imec showcased its vision for future AI hardware platforms by focusing on technologies beyond the 2nm node. Through its NanoIC initiatives and advanced semiconductor research programs, the organization demonstrated how Europe is positioning itself in next-generation semiconductor manufacturing and AI hardware development.AI is Reshaping the Semiconductor IndustryAdvanced packaging emerged as one of the most important themes during the conference. Experts stressed that future AI systems will require tight integration between processors, memory, interconnects, and photonic technologies to meet growing performance demands.Technologies such as silicon photonics, co-packaged optics, fine-pitch redistribution layers, and advanced interposer architectures were widely discussed as critical enablers for future AI infrastructure. These innovations are expected to help overcome power consumption and bandwidth limitations faced by modern AI data centers.The event also highlighted how collaboration across the semiconductor ecosystem is becoming essential. Semiconductor manufacturers, equipment suppliers, materials companies, and AI developers are increasingly working together to accelerate innovation cycles and reduce time-to-market for next-generation AI systems.Beyond Moore’s Law: The Rise of Advanced IntegrationEVENT SPOTLIGHT

30 | www.semiconductorforu.comITF World 2026 witnessed participation from several leading global technology companies, including NVIDIA, ASML, and major semiconductor ecosystem partners. A key highlight of the event was the recognition of NVIDIA founder and CEO Jensen Huang with the 2026 imec Lifetime of Innovation Award for his contributions to accelerated computing and artificial intelligence.The award reflected the growing importance of GPUs and AI accelerators in shaping the future of computing. Discussions during the event explored how AI workloads are driving demand for more advanced semiconductor technologies and high-performance infrastructure.ASML CEO Christophe Fouquet also addressed the importance of next-generation lithography technologies, including High-NA EUV systems, which are expected to play a critical role in enabling future semiconductor scaling.Industry Leaders Take Center StageBeyond technology, ITF World 2026 also underscored the geopolitical importance of semiconductors. Europe’s efforts to strengthen semiconductor sovereignty and reduce dependence on global supply chains formed an important part of the discussions.Imec’s expanding role in advanced semiconductor pilot lines and collaborative research initiatives positions the organization as a key driver of Europe’s semiconductor ambitions. The event reflected growing international efforts to build resilient semiconductor ecosystems capable of supporting future AI and high-performance computing demands.Europe’s Semiconductor Ambitions Gain MomentumITF World 2026 successfully demonstrated how semiconductor innovation is entering a new era driven by artificial intelligence. The conference reinforced that the future of AI will not rely solely on software advancements, but equally on breakthroughs in semiconductor manufacturing, advanced packaging, photonics, and system integration.As the industry moves toward increasingly AI-centric computing architectures, collaboration between global technology leaders, research organizations, and policymakers will become more critical than ever. Through ITF World 2026, imec once again positioned itself at the center of the global conversation shaping the future of semiconductors and artificial intelligence.The Road AheadEVENT SPOTLIGHT

32 | www.semiconductorforu.com Hollow core fibers (HCF) are the next generation of optical fiber technology; they are a specialized type of optical fiber designed to guide light through an air-filled central core, unlike conventional single-mode fiber (SMF) that uses a solid glass core. HCF uses photonic bandgap or anti-resonant structures to confine light within the hollow core. This unique design significantly reduces latency and signal distortion, making it a promising solution for high-performance communication systems. Currently there are two main types of hollow core fiber, double nested anti-resonant nodeless fiber (DNANF) and photonic bandgap guiding fiber (PBG), each with their own internal hollow core fiber structure and manufacturing process. TESTING HOLLOW CORE FIBER -ACCELERATING THE FUTUREOF OPTICAL NETWORKSAs hyperscale operators and data center owners push the boundaries of network performance, hollow core fiber (HCF) is emerging as the ultimate enabler, delivering ultra-low latency and low loss links for high-speed and data center interconnects. Hollow core fiber offers several significant advantages, including:Lower latency: HCF transmits light at nearly the speed of light in vacuum, resulting in latency of approximately 3.33 µs/km, compared to 4.9 µs/km for SMF.Reduced chromatic dispersion (CD): HCF typically exhibits CD values <5 ps/nm/km, while SMF shows ~17 ps/nm/km.Equivalent polarization mode dispersion (PMD): HCF can achieve PMD values below 0. 1 ps/√km, compared to 0.1 ps/√km for SMF.Reduced nonlinear effects: Due to minimal light-material interaction, HCF exhibits negligible nonlinearities.Lower attenuation at specific wavelengths: Recent advancements have achieved attenuation as low as 0.07 dB/km, outperforming typical SMF values of ~0.2 dB/km.High damage threshold: The air core allows HCF to handle higher optical powers without thermal damage.Hollow core fiber is gaining traction in industries where speed, security, and low latency are critical:AI & High-performance computing: Facilitates high-bandwidth, low-latency links for synchronization, AI model training and distributed computing.Data centers: Enables faster, low latency interconnects and longer reach without amplification. Quantum communication: Supports low-noise transmission for quantum key distribution.BLOG BEAT

www.semiconductorforu.com | 33The Future of Hollow Core FiberMANOJIT SAMADDAR\"COUNTRY DIRECTOR, VIAVI\"Defense & secure communications: Air-guided structure makes HCF resistant to physical tapping.Financial trading: Reduces latency for high-frequency trading environments.Smart cities, edge computing and 5G/6G infrastructure: Enables responsive networks required for autonomous systems and real-time data processing.Testing matters more than everHollow core fiber offers transformative potential for optical networks by offering unmatched speed and performance, but its successful deployment hinges on rigorous testing and qualification. As deployment scales, robust testing methodologies will be essential to ensuring reliability, interoperability, and long-term viability. Accurate validation of HCF links requires specialized OTDR configuration and performance, with different bidirectional analysis to ensure precise splice and fiber loss measurements, and overall link integrity. Precise link characterization is essential to guarantee performance, minimize rework, protect ROI, and meet the demanding requirements of 400G, 800G and beyond. Lacking this, operators risk performance gaps that can impact mission-critical applications. With long-standing optical test leadership, VIAVI delivers the industry’s most comprehensive suite of hollow core fiber testing solutions. The portfolio combines precision measurement, intuitive workflows, and automation to simplify every phase of the HCF lifecycle—from activation and certification to troubleshooting and long-term monitoring. Key capabilities include: Advanced dispersion analysis (CD, PMD, AP) (non-OTDR based) for short, medium, and long-distance links.Automated fiber inspection to eliminate contamination risks and ensure connector integrity.Service activation testing and monitoring to validate performance under live traffic conditions.Cloud-enabled reporting and process automation for real-time project tracking and compliance. High performance OTDR optimized for hollow core fiber characterization.Challenging the performance limits of traditional fibers, hollow core fiber technology is advancing swiftly driven by advancements in telecommunications, emerging quantum technologies, specialized industrial applications, defence and aerospace. Telecom operators are demonstrating HCF readiness and hyperscalers are deploying hollow-core fiber for high-performance AI, cloud, and data center interconnects. Emerging as the most promising advancement in optical fiber technology, HCF is becoming mainstream and increasingly deployed in niche, high-value scenarios where latency is critical.BLOG BEAT

34 | www.semiconductorforu.com WHY ADVANCED PACKAGING WILL DEFINE THE FUTURE OF SEMICONDUCTORSThe Rise of Advanced PackagingModern semiconductor applications are evolving rapidly. Artificial Intelligence (AI), Electric Vehicles (EVs), Industrial Automation, Data Centers, Renewable Energy Systems, Consumer Electronics, and Aerospace technologies now demand:• Higher performance• Lower power consumption• Faster data processing• Improved thermal efficiency• Greater system integrationTraditional packaging approaches are no longer sufficient tomeet these demands. This is where advanced semiconductor packaging technologies such as:• System-in-Package (SiP)• Multi-Chip Modules (MCM)• 2.5D and 3D Packaging• Heterogeneous Integration• Intelligent Power Modules (IPMs)are becoming increasingly critical. Packaging is no longer simply a backend activity. It is becoming a strategic differentiator that directly influences performance, reliability, and efficiency.The semiconductor industry is entering a new era. For decades, semiconductor innovation was driven by Moore’s Law - shrinking transistor sizes, increasing computing density, and pushing wafer fabrication toward smaller and smaller nodes. But today, the industry is undergoing a major structural shift.INDUSTRY SNAPSHOT Courtesy: Kaynes SemiconFor example, in electric vehicles and industrial applications, Intelligent Power Modules (IPMs) play a vital role in ensuring efficient power conversion, motor control, thermal performance, and system reliability. As demand for EVs and intelligent industrial systems grows globally, advanced packaging solutions will become increasingly important to achieving performance and energy efficiency targets.Why Packaging Matters More Than EverIn next-generation electronics, packaging determines how effectively chips communicate, dissipate heat, manage power, and integrate into complex systems. This is especially important in industries such as:• Electric mobility• Industrial power systems• AI-driven computing• Smart infrastructure• Renewable energy• Automotive electronics

www.semiconductorforu.com | 35• Expanding automotive and industrial sectors• Government support through the India Semiconductor Mission• Increasing global supply chain diversificationAs global semiconductor companies look to build resilient and diversified supply chains, India is emerging as an important manufacturing destination. The next phase of India’s semiconductor growth will depend not only on chip design — but on the ability to manufacture, package, test, and scale semiconductor solutions domestically.India’s Semiconductor OpportunityGlobally, advanced packaging is becoming one of the fastest-growing segments of the semiconductor value chain. For India, this presents a significant strategic advantage. While leading-edge wafer fabrication requires extremely high capital investment and long development cycles, OSAT and advanced packaging offer India an opportunity to build globally competitive semiconductor manufacturing capabilities more rapidly.India already possesses several strengths:• Strong engineering talent• A rapidly growing electronics ecosystem• Testing• Reliability and failure analysis• Process excellence• Scalable manufacturing infrastructureThe journey from groundbreaking to inauguration reflects India’s growing capability to execute semiconductor manufacturing projects at global speed.Kaynes Semicon: Building India’s Advanced Packaging FutureAt Kaynes Semicon, we believe advanced packaging will play a defining role in shaping the future of semiconductor manufacturing. Our OSAT Facility – EVARA in Sanand, Gujarat, has been developed with a vision to build world-class semiconductor backend manufacturing capabilities from India. The facility focuses on:• Semiconductor assembly• Advanced packagingPrime Minister Shri Narendra Modi, Kaynes Semicon showcased its IPM manufacturing capabilities as part of India’s growing semiconductor ecosystem.Enabling the Future Through IPM TechnologiesOne of the key focus areas at Kaynes Semicon is Intelligent Power Module (IPM) packaging and manufacturing. At the inauguration of the Kaynes Semicon OSAT Facility – EVARA by Hon’bleThe manufacturing process flow from die attach and wire bonding to molding and final testing - highlights the importance of precision packaging and process integration in delivering reliable, high-performance semiconductor modules.As industries increasingly move toward electrification, intelligent automation, and energy-efficient systems, advanced power semiconductor packaging will become a critical enabler of future technologies.IPM-5 and IPM-7: Powering Next-Generation SystemsKaynes Semicon’s IPM-5 and IPM-7 solutions are designed to support the evolving needs of:• Electric vehicles• Industrial automation• Smart energy systems• Motor control applications• High-efficiency power electronics These solutions represent more than products. They reflect India’s growing ability to build advanced semiconductor technologies domestically.INDUSTRY SNAPSHOTEVARA: More Than a FacilityThe Kaynes Semicon OSAT Facility - EVARA represents more than infrastructure. It reflects:• India’s semiconductor ambition• Advanced manufacturing capability• Ecosystem collaboration• Global-quality execution• Future-ready innovationAt EVARA, the focus is not only on manufacturing semiconductors, but on building an ecosystem capable of supporting the next generation of electronics and semiconductor technologies. Through collaborations with global technology partners, customers, research institutions, universities, and industry leaders, Kaynes Semicon continues to strengthen India’s semiconductor manufacturing ecosystem.At Kaynes Semicon on, we remain committed to enabling India’s semiconductor future through advanced manufacturing, packaging innovation, and global-quality execution. The future of semiconductors is being packaged today. And India is ready to build it.Built in India, for the World

36 | www.semiconductorforu.com HrdWyr Raises $13 Million for Physical AI Chip DevelopmentHrdWyr has secured $13 million in Series A funding to develop AI-native semiconductor solutions for the rapidly growing Physical AI market. The company is building specialized chips designed to power intelligent robots, autonomous machines, and edge AI systems with greater efficiency and performance. The investment will accelerate product development, team expansion, and strategic partnerships. As demand for real-world AI applications increases, HrdWyr aims to deliver next-generation computing platforms that combine high performance, low latency, and energy efficiency, enabling smarter and more capable AI-driven systems across multiple industries.INDUSTRYBULLETINInfineon Leads Europe’s Moore4Power InitiativeInfineon Technologies has launched Moore4Power, a major European semiconductor R&D initiative backed by €91 million and involving 62 partners across 15 countries. The project aims to advance next-generation power electronics through heterogeneous integration of silicon, SiC, GaN, sensing, control, and communication technologies. Targeting applications such as renewable energy, e-mobility, rail transport, and industrial automation, Moore4Power seeks to enhance energy efficiency, reliability, and power density. The initiative will also utilize AI-assisted design, digital twins, and power chiplet technologies, strengthening Europe’s semiconductor innovation, sustainability, and technological competitiveness.Navitas and NVIDIA Advance 800V AI Data Center PowerNavitas Semiconductor has joined the NVIDIA MGX ecosystem to accelerate the adoption of 800 VDC power architectures for next-generation AI data centers. The collaboration leverages Navitas’ gallium nitride (GaN) and silicon carbide (SiC) power technologies to improve energy efficiency, power density, and scalability in AI infrastructure. As AI workloads drive unprecedented power demands, 800 VDC systems offer a more efficient alternative to traditional architectures by reducing power conversion losses and simplifying power distribution. The partnership aims to support high-performance AI servers and data centers with more sustainable, reliable, and cost-effective power solutions for future computing platforms.INDUSTRY BULLETIN

www.semiconductorforu.com | 37DigiKey Earns 29 Awards at EDS 2026DigiKey has received 29 awards from supplier partners at the 2026 EDS Leadership Summit, recognizing its outstanding performance across sales, marketing, customer service, and supply chain excellence. The honors reflect DigiKey’s strong partnerships with leading semiconductor and electronic component manufacturers, as well as its commitment to supporting engineers and innovators worldwide. The recognition highlights the company’s continued focus on digital innovation, operational efficiency, and customer satisfaction, further strengthening its position as one of the world’s leading distributors of electronic components and automation products.TDK Ventures Invests in C2i for AI Data CentersTDK Ventures has invested in C2i Semiconductors, a startup focused on advanced power delivery solutions for AI data centers. The investment will support the development of technologies that improve power efficiency, density, and reliability for high-performance AI computing systems. As AI workloads drive higher energy demands, efficient power management has become critical for data center operations. C2i’s innovative approach aims to optimize power delivery to processors and accelerators, enabling more sustainable and scalable AI infrastructure. The partnership highlights growing industry efforts to address the power challenges of next-generation AI data centers.Tamil Nadu Reviews MinebeaMitsumi Semiconductor ProjectTamil Nadu Chief Minister C. Joseph Vijay reviewed the progress of MinebeaMitsumi’s ₹1,980 crore semiconductor project in the state. The investment will establish advanced manufacturing and R&D facilities for semiconductor-related precision components, including IGBTs, sensors, motors, and integrated circuits. Discussions with the company’s leadership focused on project implementation and future collaboration opportunities. The initiative is expected to boost local manufacturing capabilities, create skilled jobs, attract further investments, and strengthen Tamil Nadu’s position as a growing hub for semiconductor and electronics manufacturing in India.ADI Acquires Empower Semiconductor for $1.5 BillionAnalog Devices (ADI) has announced the acquisition of Empower Semiconductor in a deal valued at approximately $1.5 billion, strengthening its position in power management technologies for AI, cloud computing, and high-performance data center applications. Empower is known for its integrated voltage regulator (IVR) technology, which enables highly efficient, compact power delivery for advanced processors and accelerators. The acquisition will enhance ADI’s ability to address growing power efficiency and performance challenges in next-generation computing systems. By combining Empower’s innovative power solutions with ADI’s broad portfolio, the company aims to accelerate the development of energy-efficient AI and data center infrastructure.INDUSTRY BULLETIN

38 | www.semiconductorforu.com Rajasthan Gets Its First Semiconductor PlantRajasthan has marked a major milestone in India’s semiconductor journey with the establishment of its first semiconductor manufacturing facility. The project is expected to strengthen the country’s domestic chip ecosystem, reduce import dependence, and support the growing demand for semiconductors across electronics, automotive, telecommunications, and industrial sectors. The facility will also create skilled employment opportunities and attract further investments in advanced manufacturing. As India accelerates efforts to build a self-reliant semiconductor supply chain, the new plant positions Rajasthan as an emerging hub for semiconductor and electronics production.Kaynes Technology Appoints Dr. M Annadurai to BoardKaynes Technology India has appointed Dr. Mylswamy Annadurai, renowned aerospace scientist and former ISRO mission director, as an Independent Director on its Board. Widely recognized for his leadership in India’s Chandrayaan and Mangalyaan missions, Dr. Annadurai brings extensive expertise in advanced technology, innovation, and strategic development. His appointment is expected to strengthen Kaynes’ capabilities in high-tech electronics, semiconductor manufacturing, and product innovation. The move reflects the company’s commitment to enhancing governance, driving technological excellence, and supporting its long-term growth ambitions in India’s rapidly evolving electronics and semiconductor sectors.Mouser Announces 7th Technical Roadshow Across IndiaMouser Electronics will host the 7th edition of its Technical Roadshow across Pune (June 11), Bengaluru (June 13), and Chennai (June 18), 2026. The event will bring together engineers, developers, industry experts, and technology partners to explore the latest innovations in semiconductors, embedded systems, power electronics, and connectivity solutions. Attendees will gain insights through technical presentations, live demonstrations, and interactions with leading technology suppliers. The roadshow aims to foster knowledge sharing and innovation while supporting India's growing electronics design and manufacturing ecosystem.Mistral Explores Custom AI Chip DevelopmentFrench AI startup Mistral is exploring the possibility of designing its own AI chips as part of a broader strategy to strengthen its infrastructure and reduce the cost of deploying AI models. CEO Arthur Mensch said the company is evaluating custom silicon development while continuing to rely on Nvidia processors. The move aligns Mistral with leading AI firms pursuing greater control over their technology stacks. The company is also investing heavily in AI data centers across France and Sweden to expand computing capacity and support future growth.INDUSTRY BULLETIN

www.semiconductorforu.com | 39Nvidia Eyes $150B Annual Taiwan InvestmentNvidia plans to spend around $150 billion annually in Taiwan, underscoring the island’s growing role as the global hub of AI infrastructure. Speaking in Taipei, CEO Jensen Huang described Taiwan as the “epicentre” of the AI revolution, highlighting partnerships with key manufacturing leaders including TSMC, Foxconn, Wistron, and Quanta. The investment marks a sharp increase from Nvidia’s spending levels a few years ago and supports the company’s expanding AI ambitions, including new facilities, advanced computing platforms, and deeper engagement with Taiwan’s semiconductor and AI ecosystem.Huawei’s Tau Scaling PushHuawei introduced the Tau Scaling Law at IEEE ISCAS in Shanghai as a new approach to chip advancement beyond Moore’s Law. Rather than relying only on smaller transistors, the framework focuses on reducing signal delay and system execution time to improve performance and efficiency. Huawei says its LogicFolding architecture supports this model and could help boost transistor density. The company expects high-end chips designed under Tau Scaling to reach 1.4 nm-equivalent density by 2031, signaling a long-term strategy to extend semiconductor scaling despite rising fabrication challenges.Alibaba’s AI Ecosystem UpgradeAlibaba Cloud unveiled a full-stack AI upgrade for the agentic era, led by Qwen3.7-Max. The package combines a more capable foundation model with upgraded cloud infrastructure, model services, and new T-Head chips to support autonomous AI agents at enterprise scale. Alibaba says the stack is built to improve performance, reliability, and deployment flexibility across business workflows. The move strengthens its position across models, hardware, and cloud services while targeting faster adoption of agent-based automation in coding, operations, and other enterprise tasks.SpaceX’s Gas Turbine SpendingSpaceX has reportedly committed to spending more than $2.8 billion on gas turbines to power data centers used for Musk’s AI push, including Grok. The investment underscores how xAI is leaning heavily on natural-gas infrastructure to support its growing compute needs, despite criticism over pollution and permitting. The report says one deal covers $805 million through 2029, while another is a $2 billion purchase of mobile gas turbines. The move shows Musk is doubling down on AI infrastructure even as environmental and regulatory scrutiny intensifies.INDUSTRY BULLETIN

Visit OurExplore our website now www.semiconductorforu.comWebsite